Patent classifications
H10K10/466
TWO-DIMENSIONAL SEMICONDUCTOR TRANSISTOR HAVING REDUCED HYSTERESIS AND MANUFACTURING METHOD THEREFOR
A two-dimensional semiconductor transistor includes a gate electrode, a gate insulating layer disposed on the gate electrode, an organic dopant layer disposed on the gate insulating layer and comprising an organic material including electrons, a two-dimensional semiconductor layer disposed on the organic dopant layer, a source electrode disposed on the two-dimensional semiconductor layer, and a drain electrode disposed on the two-dimensional semiconductor layer and spaced apart from the source electrode. A hysteresis of the two-dimensional semiconductor transistor is reduced due to the two-dimensional semiconductor transistor including the organic dopant layer.
Electrodes for electronic devices comprising an organic semiconducting layer
The present application relates to an organic electronic device, said electronic device comprising a multi-layer electrode as well as an organic semiconducting layer, as well as to a method for producing such organic electronic device.
Polymer and organic thin film and thin film transistor and electronic device
Disclosed are a polymer including at least one structural unit with a moiety represented by Chemical Formula 1, an organic thin film including the polymer, a thin film transistor, and an electronic device. ##STR00001## In Chemical Formula 1, Ar.sup.1 to Ar.sup.3, L.sup.1, L.sup.2, and R.sup.1 to R.sup.6 are the same as described in the detailed description.
N-type end-bonded metal contacts for carbon nanotube transistors
A method for manufacturing a semiconductor device includes forming a first dielectric layer on a substrate, forming a carbon nanotube (CNT) layer on the first dielectric layer, forming a second dielectric layer on the carbon nanotube (CNT) layer, patterning a plurality of trenches in the second dielectric layer exposing corresponding portions of the carbon nanotube (CNT) layer, forming a plurality of contacts respectively in the plurality of trenches on the exposed portions of the carbon nanotube (CNT) layer, performing a thermal annealing process to create end-bonds between the plurality of the contacts and the carbon nanotube (CNT) layer, and depositing a passivation layer on the plurality of the contacts and the second dielectric layer.
POLYMER SEMICONDUCTORS, STRETCHABLE POLYMER THIN FILMS, AND ELECTRONIC DEVICES
Provided are a polymer semiconductor including a first structural unit represented by Chemical Formula 1 and a second structural unit represented by Chemical Formula 2, a stretchable polymer thin film including the same, and an electronic device.
##STR00001##
Definitions of Chemical Formulas 1 and 2 are as described in the detailed description.
Organic thin film including semiconducting polymer and elastomer configured to be dynamic intermolecular bonded with a metal-coordination bond and organic sensor and electronic device including the same
Disclosed are an organic thin film including a semiconducting polymer including a ligand that is metal-coordination bondable or is metal-coordination bonded and an elastomer including a ligand that is metal-coordination bondable or is metal-coordination bonded, wherein the semiconducting polymer and the elastomer are configured to be dynamic intermolecular bonded by a metal-coordination bond, an organic sensor, and an electronic device.
COMPOUND AND METHOD FOR PRODUCING COMPOUND
The present invention provides an intermediate compound for easily producing a compound having an azaperylene skeleton. Another object of the present invention is to provide a method for easily producing a compound having an azaperylene skeleton.
The compound of the present invention is a compound represented by Formula (I), or a compound represented by Formula (II).
##STR00001##
Heterofullerene and n-type semiconductor film using same, and electronic device
Provided is a heterofullerene where n number (where n is a positive even number) of carbon atoms constituting a fullerene are substituted by n number of boron atoms or n number of nitrogen atoms.
Method for manufacturing transistor comprising removal of oxide film
A method for manufacturing a transistor being a bottom-gate transistor is provided. The method for manufacturing a transistor includes a step of forming a first metal layer 32 on an insulator layer 20 provided on a substrate 10 including a gate electrode, a step of applying a resist onto the first metal layer 32, and patterning the first metal layer 32 by a photolithographic method, an oxide film removal step of removing an oxide film 26 formed on the patterned first metal layer 32, and a step of forming a source electrode and a drain electrode by forming a second metal layer 42 on the first metal layer 32.
Array substrate and display device
The present disclosure provides an array substrate and a display panel. The driving circuit layer of the array substrate provided with a first thin-film transistor (TFT) and a second TFT. An exemplified active layer of a P-type TFT is formed by organic conductive polymer material. By using organic conductive polymer materials as the active layer material of the first TFT, the technical problems of the flexibility of the display substrate resulting by the characteristics of the low temperature polysilicon material are solved. The flexibility of the array substrate is enhanced.