The present disclosure pertains to the field of carbon nanotube technologies, and provides a carbon nanotube semiconductor device and a manufacturing method thereof. The manufacturing method of a carbon nanotube semiconductor device provided in the present disclosure comprises: forming a carbon nanotube layer with a carbon nanotube solution; and treating the carbon nanotube layer with an acidic solution. The carbon nanotube semiconductor device manufactured by the method of the present disclosure has good performance uniformity.

A method of synthesizing a fused heteroaromatic compound includes obtaining a first intermediate from a first compound represented by Chemical Formula 1 and a second compound represented by Chemical Formula 2, obtaining a second intermediate including a ring having a chalcogen element from the first intermediate, and obtaining a fused heteroaromatic compound by a cyclization reaction of the second intermediate.

A field effect transistor photodetector that can operate in room temperature includes a source electrode, a drain electrode, a channel to allow an electric current to flow between the drain and source electrodes, and a gate electrode to receive a bias voltage for controlling the current in the channel. The photodetector includes a light-absorbing material that absorbs light and traps electric charges. The light-absorbing material is configured to generate one or more charges upon absorbing light having a wavelength within a specified range and to hold the one or more charges. The one or more charges held in the light-absorbing material reduces the current flowing through the channel.

A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.

Embodiments of the invention include a method of fabrication of a semiconductor structure. The method of fabrication includes: Forming a trench in a first dielectric material down to a first conductive material of a bottom gate. A sidewall of the trench contacts a top surface of the first conductive material. Depositing a second conductive material on the sidewall of the trench, which forms an electrical connection with the first conductive material. Depositing a second dielectric material in the trench, and on the second conductive material. Depositing a gate dielectric material on the second conductive material and the dielectric materials. Forming a channel material on the gate dielectric material. Depositing another conductive material on the channel material and portions of the gate dielectric material to form a source terminal and a drain terminal.

A display panel includes an EL panel section, a CF panel section, and a sealing resin layer. In the EL panel section, the surface of a sealing layer has a projected and recessed shape in a Z-axis direction as a whole, wherein a light-emitting region corresponding to a region between banks is a recessed section, and a non-light-emitting region corresponding to a top portion of the bank is a projected section. The sealing resin layer includes a first sealing resin layer and a second sealing resin layer. Prior to performing heating or light irradiation in a step of forming the first and second sealing resin layers, the viscosity of a second non-fluid resin constituting the second sealing resin layer is lower than the viscosity of a first non-fluid resin constituting the first sealing resin layer.

A thin film transistor includes a gate electrode, an insulation film disposed on the gate electrode, a semiconductor layer facing the gate electrode with the insulation film in between, and a source-drain wiring layer electrically coupled to the semiconductor layer, and including a first wiring layer and a second wiring layer. The first wiring layer is in contact with the semiconductor layer between the semiconductor layer and the insulation film, and is configured of a transparent electroconductive film. The second wiring layer is overlapped with a portion of the first wiring layer. Another semiconductor layer made of a material same as a material of the semiconductor layer is stacked on the second wiring layer.

A composition for forming an organic semiconductor film includes an organic semiconductor represented by Formula A-1, a polymer, a solvent having a boiling point of 150° C. or higher and an SP value of 18 to 23, and a silicone compound having a structure represented by Formula D-1.

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Disclosed is a fluorine-containing composition containing a fluorine-containing compound represented by general formula (1) and a fluorine-based solvent.

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The present invention provides compounds of formula (1) wherein o is 1, 2 or 3, p is 0, 1 or 2, n is 0, 1 or 2, m is 0, 1 or 2, and A is a mono- or polycyclic ring system, which may contain at least one heteroatom, and an electronic device comprising the compounds as semiconducting material. ##STR00001##