H10K10/491

Method of manufacturing semiconductor devices including the steps of removing a plurality of spacers that surrounds each of the plurality of nanotubes into a layer of nanotubes, and forming gate dielectric and/or gate electrode

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

METHOD OF MANUFACTURING A FIELD EFFECT TRANSISTOR USING CARBON NANOTUBES AND A FIELD EFFECT TRANSISTOR

In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.

Method of Manufacturing Semiconductor Devices

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Organic light emitting transistor, temperature sensing device and temperature detecting method

Embodiments of the present disclosure provide an organic light emitting transistor comprising: a substrate, and a gate electrode, a gate insulating layer, source/drain electrodes and a light emitting functional layer disposed on the substrate, wherein the organic light emitting transistor further comprises an external electrode coupled to the gate electrode in series, wherein a temperature-dependent resistance change rate of the gate electrode is different from a temperature-dependent resistance change rate of the external electrode.

High current OTFT devices with vertical designed structure and donor-acceptor based organic semiconductor materials

Described herein are electronics that incorporate heterocyclic organic compounds. More specifically, described herein are organic electronics systems that are combined with donor-acceptor organic semiconductors, along with methods for making such devices, and uses thereof.

Double-Gate Carbon Nanotube Transistor and Fabrication Method
20220302389 · 2022-09-22 ·

A method includes depositing a dielectric layer over a substrate, forming carbon nanotubes on the dielectric layer, forming a dummy gate stack on the carbon nanotubes, forming gate spacers on opposing sides of the dummy gate stack, and removing the dummy gate stack to form a trench between the gate spacers. The carbon nanotubes are exposed to the trench. The method further includes etching a portion of the dielectric layer underlying the carbon nanotubes, with the carbon nanotubes being suspended, forming a replacement gate dielectric surrounding the carbon nanotubes, and forming a gate electrode surrounding the replacement gate dielectric.

DISPLAY PANELS AND DISPLAY DEVICES

A display panel includes a switching transistor and a light-emitting transistor. The switching transistor includes a first gate electrode, a first source electrode, a first active layer, and a first drain electrode. The light-emitting transistor includes a second gate electrode, a second source electrode, a second active layer, a light-emitting layer, and a second drain electrode. The second gate electrode is the first drain electrode of the switching transistor. The switching transistor and the light-emitting transistor may be on a substrate. The switching transistor, the second source electrode, the second active layer, the light-emitting layer, and the second drain electrode are stacked in a direction perpendicular to the surface of the substrate.

2D-Channel Transistor Structure with Asymmetric Substrate Contacts

Semiconductor devices and methods of forming the same are provided. A method includes providing a workpiece having a semiconductor structure; depositing a two-dimensional (2D) material layer over the semiconductor structure; forming a source feature and a drain feature electrically connected to the semiconductor structure and the 2D material layer, wherein the source feature and drain feature include a semiconductor material; and forming a gate structure over the two-dimensional material layer and interposed between the source feature and the drain feature. The gate structure, the source feature, the drain feature, the semiconductor structure and the 2D material layer are configured to form a field-effect transistor. The semiconductor structure and the 2D material layer function, respectively, as a first channel and a second channel between the source feature and the drain feature.

Semiconductor Devices and Methods of Manufacture

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

NANOELECTRONIC DEVICE AND METHOD FOR PRODUCING THEREOF

The present invention relates to a nanoelectronic device, comprising a substrate layer (10), a first electrode layer (12) disposed on the substrate layer (10), a dielectric layer (16) disposed on the first electrode layer (12), a second electrode layer (18) disposed on the dielectric layer (16), wherein the dielectric layer (16) and the second electrode layer (18) are dimensioned such that at least one protruding portion (18a, 18b) of the second electrode layer (18) is formed in which the second electrode layer (18) extends beyond the dielectric layer such that opposing faces of the first and second electrode are formed (16), at least one semiconductor layer (20) disposed between the first electrode layer (12), one of the protruding portions (18a, 18b) of the second electrode layer (18) and the dielectric layer (16); and a gating arrangement (22) in contact with at least the semiconductor layer (20) as well as the first (12) and second (18) electrode layers.