H10N60/0381

PROCESS FOR THE PRODUCTION OF HIGH TEMPERATURE SUPERCONDUCTOR WIRES
20180114892 · 2018-04-26 · ·

The present invention is in the field of processes for the production of high temperature super-conductor wires. In particular, the present invention relates to a process for the production of high temperature superconductor wires comprising heating a film comprising yttrium or a rare earth metal, an alkaline earth metal, and a transition metal to a temperature of at least 700 C. and cooling the film to a temperature below 300 C., wherein the heating and cooling is per-formed at least twice.

Josephson Junction using Molecular Beam Epitaxy
20250057053 · 2025-02-13 · ·

According to various implementations of the invention, a vertical Josephson Junction device may be realized using molecular beam epitaxy (MBE) growth of YBCO and PBCO epitaxial layers in an a-axis crystal orientation. Various implementations of the invention provide improved vertical JJ devices using SiC or LSGO substrates; GaN, AlN, or MgO buffer layers; YBCO or LSGO template layers; YBCO conductive layers and various combinations of barrier layers that include PBCO, NBCO, and DBCO. Such JJ devices are simple to fabricate with wet and dry etching, and allow for superior current flow across the barrier layers.

Nanoscale Device Comprising an Elongated Crystalline Nanostructure

The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.

Semiconductor Josephson Junction and a Transmon Qubit Related Thereto

The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Superconductor, superconducting wire, and method of forming the superconductor

A super conductor is formed by a process including a first step of forming liquid-phase rare earth-copper-barium oxide by heat treating a superconductor precursor including a rare earth element, barium, and copper, a second step of forming a first superconductor of the rare earth-copper-barium oxide that is epitaxially grown from the liquid-phase rare earth-copper-barium oxide, and a third step of forming a second superconductor of the rare earth-copper-barium oxide by heat treating the first superconductor, wherein the heat treatment of the third step is performed in an atmosphere in which the rare earth-copper-barium oxide has no liquid phase.

Coated conductor high temperature superconductor carrying high critical current under magnetic field by intrinsic pinning centers, and methods of manufacture of same
09564258 · 2017-02-07 · ·

A coated conductor comprises a substrate supporting a ReBCO superconductor adapted to carry current in a superconducting state. The superconductor is characterized in having peaks in critical current (J.sub.c) of at least 0.2 MA/cm.sup.2 in a magnetic field of about 1 Tesla when the field is applied normal to the surface of the superconductor and when the field is applied parallel to the surface of the superconductor, and further characterized in that the superconductor includes horizontal defects and columnar defects in a size and an amount sufficient to result in the said critical current response. The conductor is characterized in that the ratio of the height of the peaks in the J.sub.c is in the range from 3:1 with the ratio of the field perpendicular (0 degrees) to the field parallel (+/90 degrees) to the range from 3:1 with the ratio of the field parallel to the field perpendicular.

Josephson junction using molecular beam epitaxy
12389809 · 2025-08-12 · ·

According to various implementations of the invention, a vertical Josephson Junction device may be realized using molecular beam epitaxy (MBE) growth of YBCO and PBCO epitaxial layers in an a-axis crystal orientation. Various implementations of the invention provide improved vertical JJ devices using SiC or LSGO substrates; GaN, AlN, or MgO buffer layers; YBCO or LSGO template layers; YBCO conductive layers and various combinations of barrier layers that include PBCO, NBCO, and DBCO. Such JJ devices are simple to fabricate with wet and dry etching, and allow for superior current flow across the barrier layers.

Enhanced NB3SN surfaces for superconducting cavities

A system and method for treating a cavity comprises arranging a niobium structure in a coating chamber, the coating chamber being arranged inside a furnace, coating the niobium structure with tin thereby forming an Nb.sub.3Sn layer on the niobium structure, and doping the Nb.sub.3Sn layer with nitrogen, thereby forming a nitrogen doped Nb.sub.3Sn layer on the niobium structure.

A-axis Josephson Junctions with improved smoothness

According to various implementations of the invention, high quality a-axis XBCO may be grown with low surface roughness. According to various implementations of the invention, low surface roughness may be obtained by: 1) adequate substrate preparation; 2) calibration of flux rates for constituent atoms; and/or 3) appropriate control of temperature during crystal growth. According to various implementations of the invention, a wafer comprises a smoothing layer of c-axis XBCO; a first conducting layer of a-axis XBCO formed on the smoothing layer; an insulating layer formed on the first conducting layer; and a second conducting layer of a-axis XBCO formed on the insulating layer, where, for a same surface roughness, a thickness of the smoothing layer and the first conducting layer combined is greater than a thickness of the first conducting layer without the smoothing layer.