H10N70/8265

Variable resistance memory device

A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.

NOVEL RESISTIVE RANDOM ACCESS MEMORY DEVICE
20230090628 · 2023-03-23 ·

A memory cell includes: a resistive material layer comprising a first portion that extends along a first direction and a second portion that extends along a second direction, wherein the first and second directions are different from each other; a first electrode coupled to a bottom surface of the first portion of the resistive material layer; and a second electrode coupled to the second portion of the resistive material layer.

Resistive random access memory device

A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.

MEMORY CELL, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS OF MANUFACTURING THE SAME

A memory cell includes a dielectric structure, a storage element structure, and a top electrode. The storage element structure is disposed in the dielectric structure, and the storage element structure includes a first portion and a second portion. The first portion includes a first side and a second side opposite to the first side, where a width of the first side is less than a width of the second side. The second portion is connected to the second side of the first portion, where a width of the second portion is greater than the width of the first side. The top electrode is disposed on the storage element structure, where the second portion is disposed between the first portion and the top electrode.

MEMORY CELL, SEMICONDUCTOR DEVICE HAVING THE SAME, AND METHODS OF MANUFACTURING THE SAME

A memory cell includes a bottom electrode, a storage element layer, a first buffer layer, and a top electrode. The storage element layer is disposed over the bottom electrode. The first buffer layer is interposed between the storage element layer and the bottom electrode, where a thermal conductivity of the first buffer layer is less than a thermal conductivity of the storage element layer. The top electrode is disposed over the storage element layer, where the storage element layer is disposed between the top electrode and the first buffer layer.

VARIABLE RESISTANCE MEMORY DEVICE

A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.

SEMICONDUCTOR DEVICE INCLUDING MEMORY CELLS AND METHOD FOR MANUFACTURING THEREOF

A semiconductor device includes logic circuitry including a transistor disposed over a substrate, multiple layers each including metal wiring layers and an interlayer dielectric layer, respectively, disposed over the logic circuitry, and memory arrays. The multiple layers of metal wiring include, in order closer to the substrate, first, second, third and fourth layers, and the memory arrays include lower multiple layers disposed in the third layer.

SEMICONDUCTOR DEVICE, MEMORY CELL AND METHOD OF FORMING THE SAME

A memory cell includes a bottom electrode, a memory element, a selector, a top electrode and a connecting structure. The memory element is disposed on the bottom electrode. The selector is disposed on the memory element. The top electrode is disposed on the selector. The connecting structure is electrically connecting the memory element to the selector, wherein the connecting structure includes a base portion and a pillar portion. The base portion disposed on the memory element. The pillar portion is disposed on the base portion, wherein the pillar portion is physically connected to the selector, and includes a tapered pillar foot.

Vertical nonvolatile memory device including memory cell string

A vertical nonvolatile memory device including memory cell strings using a resistance change material is provided. Each of the memory cell strings of the nonvolatile memory device includes a semiconductor layer extending in a first direction; a plurality of gates and a plurality of insulators alternately arranged in the first direction; a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer; and a resistance change layer extending in the first direction on a surface of the semiconductor layer. The resistance change layer includes a metal-semiconductor oxide including a mixture of a semiconductor material of the semiconductor layer and a transition metal oxide.

Projected memory device with carbon-based projection component

A projected memory device includes a carbon-based projection component. The device includes two electrodes, a memory segment, and a projection component. The projection component and the memory segment form a dual element that connects the two electrodes. The projection component extends parallel to and in contact with the memory segment. The memory segment includes a resistive memory material, while the projection component includes a thin film of non-insulating material that essentially comprises carbon. In a particular implementation, the non-insulating material and the projection component essentially comprises amorphous carbon. Using carbon and, in particular, amorphous carbon, as a main component of the projection component, allows unprecedented flexibility to be achieved when tuning the electrical resistance of the projection component.