The present disclosure provides a semiconductor device structure with fine boron nitride spacer patterns and a method for forming the semiconductor device structure, which can prevent the collapse of the fine patterns. The semiconductor device structure includes a first target structure and a second target structure disposed over a semiconductor substrate. The semiconductor device structure also includes a first boron nitride spacer disposed over the first target structure, wherein a topmost point of the first boron nitride spacer is between a central line of the first target structure and a central line of the second target structure in a cross-sectional view.

A semiconductor structure includes: a germanium layer; and a first insulating film that is formed on an upper surface of the germanium layer, primarily contains germanium oxide and a substance having an oxygen potential lower than an oxygen potential of germanium oxide, and has a physical film thickness of 3 nm or less; wherein a half width of frequency to height in a 1 μm square area of the upper surface of the germanium layer is 0.7 nm or less.

Disclosed herein is a pattern forming method comprising providing a substrate devoid of a layer of a brush polymer; disposing upon the substrate a composition comprising a block copolymer comprising a first polymer and a second polymer; where the first polymer and the second polymer of the block copolymer are different from each other; and an additive polymer where the additive polymer comprises a bottlebrush polymer; where the bottlebrush polymer comprises a polymeric chain backbone and a grafted polymer that are bonded to each other; and where the bottlebrush polymer comprises a polymer that is chemically and structurally the same as one of the polymers in the block copolymer or where the bottlebrush polymer comprises a polymer that has a preferential interaction with one of the blocks of the block copolymers; and a solvent; and annealing the composition to facilitate domain separation between the first polymer and the second polymer.

A method of manufacturing a germanium-on-insulator substrate is disclosed. The method comprises: providing (102) a first semiconductor substrate, and a second semiconductor substrate formed with a germanium layer; bonding (102) the first semiconductor substrate to the second semiconductor substrate using at least one dielectric material to form a combined substrate, the germanium layer being arranged intermediate the first and second semiconductor substrates; removing (104) the second semiconductor substrate from the combined substrate to expose at least a portion of the germanium layer with misfit dislocations; and annealing (106) the combined substrate to enable removal of the misfit dislocations from the portion of the germanium layer.

There is provided a substrate processing method, comprising the steps of: supplying source gas into a processing chamber in which substrates are accommodated; removing the source gas and an intermediate body of the source gas remained in the processing chamber; supplying ozone into the processing chamber in a state of substantially stopping exhaust of an atmosphere in the processing chamber; and removing the ozone and the intermediate body of the ozone remained in the processing chamber; with these steps repeated multiple number of times, to thereby form an oxide film on the surface of the substrates by supplying the source gas and the ozone alternately so as not to be mixed with each other.

High-chi diblock copolymers are disclosed whose self-assembly properties are suitable for forming hole and bar openings for conductive interconnects in a multi-layered structure. The hole and bar openings have reduced critical dimension, improved uniformity, and improved placement error compared to the industry standard poly(styrene)-b-poly(methyl methacrylate) block copolymer (PS-b-PMMA). The BCPs comprise a poly(styrene) block, which can optionally include repeat units derived from trimethylsilyl styrene, and a second block that can be a polycarbonate block or a polyester block. Block copolymers comprising a fluorinated linking group L′ comprising 1-25 fluorines between the blocks can provide further improvement in uniformity of the openings.

A method for etching silicon at cryogenic temperatures is provided. The method includes forming an inert layer from condensation of a noble gas at cryogenic temperatures on exposed surfaces such as the sidewalls of a feature to passivate the sidewalls prior to the etching process. The method further includes flowing a fluorine-containing precursor gas into the chamber to form a fluorine-containing layer on the inert layer. The method further includes exposing the fluorine-containing layer and the inert layer to an energy source to form a passivation layer on the exposed portions of the substrate and exposing the substrate to ions to etch the substrate.

A semiconductor structure and a method for fabricating the same. The semiconductor structure includes a gallium arsenide substrate, a thiourea-based passivation layer in contact with at least a top surface of the gallium arsenide substrate, and a capping layer in contact with the thiourea-based passivation layer. The method includes passivating a gallium arsenide substrate utilizing thiourea to form a passivation layer in contact with at least a top surface of the gallium arsenide substrate. The method further includes forming a capping layer in contact with at least a top surface of the passivation layer, and annealing the capping layer and the passivation layer.

A film forming method for forming a film on a pattern and cleaning a space of a processing container configured to perform therein a plasma processing under a reduced pressure environment. The space is provided with a pedestal and an upper electrode configured to supply radio-frequency power. The upper electrode is disposed in the space to face the pedestal. The method includes: placing a substrate having the pattern on the pedestal provided in the space of the processing container configured to perform therein a plasma processing under a reduced pressure environment; adjusting temperature of a main surface of the substrate for each of a plurality of regions on the main surface of the substrate; and after the adjusting with the substrate on the pedestal, repeating an ordered sequence of a first step of forming a deposition film on the pattern of the substrate and on an inner surface of the processing container, wherein the inner surface includes an inner surface of the upper electrode; and a second step of supplying electric power only to the upper electrode to generate plasma in the space, thereby cleaning the space and the inner surface.

Methods for forming coating films comprising germanium oxide are disclosed. In some embodiments, the films are super-conformal to a feature on the surface of a substrate. The films are deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the super-conformal film.