Patent classifications
H01L21/02203
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING LOW-K CARBON-CONTAINING DIELECTRIC LAYER
A method for manufacturing a semiconductor device having a low-k carbon-containing dielectric layer includes: depositing a low-k carbon-containing dielectric material, which has a carbon content ranging from 16 atomic % to 23 atomic %, using a precursor mixture to form a carbon-containing dielectric layer having a k value ranging from 2.8 to 3.3 and a porosity ranging from 0.03% to 1.0%; forming the carbon-containing dielectric layer into a patterned carbon-containing dielectric layer having a recess therein by etching, the patterned carbon-containing dielectric layer having a porosity ranging from 1.0% to 2.0%; and filling the recess with an electrically conductive material to form an electrically conductive feature in the patterned carbon-containing dielectric layer.
Semiconductor structure with partially embedded insulation region and related method
A technique to make silicon oxide regions from porous silicon and related semiconductor structures is disclosed. The porous silicon is made in situ by anodizing P doped silicon regions. Thus, the shape and profile of the oxide regions may be controlled by controlling the shape and profile of the P doped silicon regions.
Low Dielectric Constant Film and Preparation Method Thereof
Provided is a low dielectric constant film and a preparation method thereof, where epoxy alkanes, organosilicon compounds and fluorine-containing siloxane compounds are used as raw materials of the low dielectric constant film, and the low dielectric constant film is formed on a substrate surface by a plasma-enhanced chemical deposition method. Accordingly, a nanofilm with a low dielectric constant and excellent hydrophobicity is formed on the substrate surface.
Method of manufacturing semiconductor devices and semiconductor devices
A method of manufacturing a semiconductor device, a plurality of fin structures are formed over a semiconductor substrate. The fin structures extend along a first direction and are arranged in a second direction crossing the first direction. A plurality of sacrificial gate structures extending in the second direction are formed over the fin structures. An interlayer dielectric layer is formed over the plurality of fin structures between adjacent sacrificial gate structures. The sacrificial gate structures are cut into a plurality of pieces of sacrificial gate structures by forming gate end spaces along the second direction. Gate separation plugs are formed by filling the gate end spaces with two or more dielectric materials. The two or more dielectric materials includes a first layer and a second layer formed on the first layer, and a dielectric constant of the second layer is smaller than a dielectric constant of the first layer.
SELECTIVE DEPOSITION ON METALS USING POROUS LOW-K MATERIALS
A method is presented for selective deposition on metals using porous low-k materials. The method includes forming alternating layers of a porous dielectric material and a first conductive material, forming a surface aligned monolayer (SAM) over the first conductive material, depositing hydroxamic acid (HA) material over the porous dielectric material, growing an oxide material over the first conductive material, removing the SAM, depositing a dielectric layer adjacent the oxide material, and replacing the oxide material with a second conductive material defining a bottom electrode.
Method for porosifying a material and semiconductor structure
A method for porosifying a Ill-nitride material in a semiconductor structure is provided, the semiconductor structure comprising a sub-surface structure of a first Ill-nitride material, having a charge carrier density greater than 5×10.sup.17 cm.sup.−3, beneath a surface layer of a second Ill-nitride material, having a charge carrier density of between 1×10.sup.14 cm.sup.−3 and 1×10.sup.17 cm.sup.−3. The method comprises the steps of exposing the surface layer to an electrolyte, and applying a potential difference between the first Ill-nitride material and the electrolyte, so that the sub-surface structure is porosified by electrochemical etching, while the surface layer is not porosified. A semiconductor structure and uses thereof are further provided.
SUBSTRATE INTERMEDIARY BODY, THROUGH-HOLE VIA ELECTRODE SUBSTRATE, AND THROUGH-HOLE VIA ELECTRODE FORMATION METHOD
A substrate intermediary body includes: a substrate having a hole in a thickness direction, and a conductor being disposed in the hole; and an adhesion layer formed on a wall surface of the hole. The adhesion layer contains a reaction product of a polymer (A) having a cationic functional group and having a weight-average molecular weight of from 2,000 to 1,000,000 and a polyvalent carboxylic acid compound (B) having two or more carboxyl groups per molecule or a derivative thereof.
Forming a low-k dielectric layer with reduced dielectric constant and strengthened mechanical properties
A low-k dielectric porous silicon oxycarbon layer is formed within an integrated circuit. In one embodiment, a porogen and bulk layer containing silicon oxycarbon layer is deposited, the porogens are selectively removed from the formed layer without simultaneously cross-linking the bulk layer, and then the bulk layer material is cross-linked. In other embodiments, multiple silicon oxycarbon sublayers are deposited, porogens from each sub-layer are selectively removed without simultaneously cross-linking the bulk material of the sub-layer, and the sub-layers are cross-linked separately.
Low dielectric constant siliceous film manufacturing composition and methods for producing cured film and electronic device using the same
To provide a low dielectric constant siliceous film manufacturing composition capable of forming a low dielectric constant siliceous film with dispersed pores having excellent mechanical properties and stable electrical properties. [Means] The present invention provides a low dielectric constant siliceous film manufacturing composition comprising: a polysiloxane, a pore-generating material, a condensation catalyst generator, and a solvent.
METHODS FOR FILLING A GAP FEATURE ON A SUBSTRATE SURFACE AND RELATED SEMICONDUCTOR STRUCTURES
A method for filling a gap feature on a substrate surface is disclosed. The method may include: providing a substrate comprising a non-planar surface including one or more gap features; depositing a metal oxide film over a surface of the one or more gap features by a cyclical deposition process; contacting the metal oxide with an organic ligand vapor; and converting at least a portion of the metal oxide film to a porous material thereby filling the one or more gap features. Semiconductor structures including a metal-organic framework material formed by the methods of the disclosure are also disclosed.