Patent classifications
H01L21/0226
Spacer-assisted lithographic double patterning
Integrated chips and methods of forming the same include forming a first set of sidewall spacers on a first mandrel at first vertical level. The first mandrel is etched away. A second set of sidewall spacers is formed on a second mandrel at a second vertical level. A portion of the second set of sidewall spacers vertically overlaps with a portion of the first set of sidewall spacers. The second mandrel is etched away. A first hardmask layer is etched, using the vertically overlapping first set of sidewall spacers and second set of sidewall spacers as a mask.
Differential type sensing circuit with differential input and output terminal pair
A differential type non-volatile memory circuit comprising a differential sensing circuit, a differential data line pair, a memory cell array, and a differential bit line pair is provided. The differential sensing circuit has a differential input terminal pair and a differential output terminal pair. The differential data line pair is electrically connected to the differential input terminal pair of the differential sensing circuit. The memory cell array has at least one differential non-volatile memory cell configured to store data. The differential bit line pair is electrically connected between the memory cell array and the differential data line pair. When logic states of the differential output terminal pair start to be different in a read operation phase of the memory cell array, the differential sensing circuit and the differential data line pair are disconnected.
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.
Semiconductor device and method for forming the same
Semiconductor devices and a method for forming the same are provided. In various embodiments, a method for forming a semiconductor device includes receiving a semiconductor substrate including a channel. An atmosphere-modulation layer is formed over the channel. An annealing process is performed to form an interfacial layer between the channel and the atmosphere-modulation layer.
Manufacturing method of organic light-emitting display and mask assembly
A method of manufacturing a display device includes preparing a pixel circuit substrate including thin-film transistors and pixel electrodes respectively electrically connected to the thin-film transistors, forming a first deposition layer on the pixel circuit substrate using a first mask assembly, and forming a second deposition layer on the pixel circuit substrate using a second mask assembly. At least one of the first mask assembly and the second mask assembly includes a mask plate including an opening portion through which a deposition material passes and a covering portion that blocks a passage of the deposition material. The mask plate includes a protruding portion that protrudes from an edge of the covering portion toward a center region of the opening portion.
Trenched bottom electrode and liftoff based molecular devices
A system and method for fabricating at least one of, a molecular device element and a TBELMD including depositing a first electrode material on an insulating substrate or layer, performing a photolithography process in the first electrode material, creating a trench component in the first electrode material with the photolithography process, determining a section of the electrode material to remove based on at least one of, a molecular device element and a TBELMD to be produced, removing the section of said first electrode material, oxidizing a portion of the first electrode material, creating a first insulator part from the oxidized portion of the first electrode material, in which the oxidized portion of the first electrode material includes at least a first electrode metal surface, depositing a second electrode material, and bridging the first and second electrode material.
SOI SUBSTRATE AND RELATED METHODS
Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.
SOI SUBSTRATE AND RELATED METHODS
Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.
Sensing device for sensing minor charge variations
A charge sensing device for sensing charge variations in a charge storage area includes: a TFET having at least one sense gate; and a capacitive coupling for coupling the charge storage area with the sense gate.
Semiconductor device, manufacturing method thereof, and display device including the semiconductor device
To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.