H01L21/02318

Methods of forming SOI substrates

Methods of forming SOI substrates are disclosed. In some embodiments, an epitaxial layer and an oxide layer are formed on a sacrificial substrate. An etch stop layer is formed in the epitaxial layer. The sacrificial substrate is bonded to a handle substrate at the oxide layer. The sacrificial substrate is removed. The epitaxial layer is partially removed until the etch stop layer is exposed.

MOLECULAR LAYER DEPOSITION METHOD AND SYSTEM

Exemplary processing methods may include flowing a first deposition precursor into a substrate processing region to form a first portion of an initial compound layer. The first deposition precursor may include an aldehyde reactive group. The methods may include removing a first deposition effluent including the first deposition precursor from the substrate processing region. The methods may include flowing a second deposition precursor into the substrate processing region. The second deposition precursor may include an amine reactive group, and the amine reactive group may react with the aldehyde reactive group to form a second portion of the initial compound layer. The methods may include removing a second deposition effluent including the second deposition precursor from the substrate processing region. The methods may include annealing the initial compound layer to form an annealed carbon-containing material on the surface of the substrate.

Mechanism for FinFET Well Doping
20210358799 · 2021-11-18 ·

The embodiments of mechanisms for doping wells of finFET devices described in this disclosure utilize depositing doped films to dope well regions. The mechanisms enable maintaining low dopant concentration in the channel regions next to the doped well regions. As a result, transistor performance can be greatly improved. The mechanisms involve depositing doped films prior to forming isolation structures for transistors. The dopants in the doped films are used to dope the well regions near fins. The isolation structures are filled with a flowable dielectric material, which is converted to silicon oxide with the usage of microwave anneal. The microwave anneal enables conversion of the flowable dielectric material to silicon oxide without causing dopant diffusion. Additional well implants may be performed to form deep wells. Microwave anneal(s) may be used to anneal defects in the substrate and fins.

Apparatus and methods for manufacturing semiconductor structures using protective barrier layer

Methods for forming a semiconductor structure including a silicon (Si) containing layer or a silicon germanium (SiGe) layer are provided. The methods include depositing a protective barrier (e.g., liner) layer over the semiconductor structure, forming a flowable dielectric layer over the liner layer, and exposing the flowable dielectric layer to high pressure steam. A cluster system includes a first deposition chamber configured to form a semiconductor structure, a second deposition chamber configured to perform a liner deposition process to form a liner layer, a third deposition chamber configured to form a flowable dielectric layer over the liner layer, an annealing chamber configured to expose the flowable oxide layer to high pressure steam.

Process for fabricating one or more ultra-large area nanoscale polymer films

The process to fabricate a polymer film includes baking a cyclic olefin copolymer (COC) and a silicon wafer at a predefined temperature. The process also includes attaching a plastic tape frame to the silicon wafer and submerging the COC and the plastic tape frame within water allowing one or more ultra-thin sheets of COC film to be peeled off.

Semiconductor device and method

In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.

METHOD FOR CHUCK COMPENSATION VIA WAFER SHAPE CONTROL

Methods described herein address the chuck degradation challenge that can result in wafer distortion upon wafer coupling, leading to downstream fabrication issues. Techniques include actively monitoring wear of a chuck and counteracting chuck degradation by wafer shape manipulation to maintain an ideal working surface. Techniques include using chuck-based flatness metrology and/or modeling based on previous wafer level results and/or historical database of chuck wear information.

METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE

A method for forming a semiconductor structure includes forming a gate structure on a substrate, performing a deposition process to form a nitride layer to cover the substrate and the gate structure, performing an in-situ annealing process to the nitride layer, and performing an anisotropic etching process to the nitride layer after the in-situ annealing process to form a spacer on a sidewall of the gate structure.

METHODS OF FORMING SOI SUBSTRATES

Methods of forming SOI substrates are disclosed. In some embodiments, an epitaxial layer and an oxide layer are formed on a sacrificial substrate. An etch stop layer is formed in the epitaxial layer. The sacrificial substrate is bonded to a handle substrate at the oxide layer. The sacrificial substrate is removed. The epitaxial layer is partially removed until the etch stop layer is exposed.

Mechanism for FinFET Well Doping
20230343634 · 2023-10-26 ·

The embodiments of mechanisms for doping wells of finFET devices described in this disclosure utilize depositing doped films to dope well regions. The mechanisms enable maintaining low dopant concentration in the channel regions next to the doped well regions. As a result, transistor performance can be greatly improved. The mechanisms involve depositing doped films prior to forming isolation structures for transistors. The dopants in the doped films are used to dope the well regions near fins. The isolation structures are filled with a flowable dielectric material, which is converted to silicon oxide with the usage of microwave anneal. The microwave anneal enables conversion of the flowable dielectric material to silicon oxide without causing dopant diffusion. Additional well implants may be performed to form deep wells. Microwave anneal(s) may be used to anneal defects in the substrate and fins.