Patent classifications
H01L21/02428
EPITAXIAL STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face, and the growth face has an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer. Through the method of manufacturing the epitaxial structure, when the silicon face of the silicon carbide substrate has the off-angle, the problem of a poor epitaxial quality of the first group III nitride layer and a poor epitaxial quality of the second group III nitride layer could be effectively relieved.
Method for fabricating semiconductor structure including the substrate structure
A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from −20 μm to −40 μm.
SEMICONDUCTOR WAFER OF MONOCRYSTALLINE SILICON AND METHOD OF PRODUCING THE SEMICONDUCTOR WAFER
Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p.sup.+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer;
an oxygen concentration of the substrate wafer of not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3;
a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and
the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.
ENGINEERED SUBSTRATE STRUCTURES FOR POWER AND RF APPLICATIONS
A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.
Susceptor for holding a semiconductor wafer having an orientation notch, a method for depositing a layer on a semiconductor wafer, and semiconductor wafer
A semiconductor wafer processing susceptor for holding a wafer having an orientation notch during deposition of a layer on the wafer, having a placement surface for supporting the semiconductor wafer in the rear edge region of the wafer, the placement surface having a stepped outer delimitation, and an indentation of the outer delimitation of the placement surface for placement of the partial region of the edge region of the rear side of the wafer in which the orientation notch is located onto a partial region of the placement surface delimited by the indentation of the outer delimitation of the placement surface. The susceptor is used in a method for depositing a layer on a wafer having an orientation notch, and wafers made of monocrystalline silicon upon which layers are deposited using the susceptor have greater local flatness on both front and rear sides proximate the orientation notch.
Methods of manufacturing engineered substrate structures for power and RF applications
A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial layers by epitaxial growth on the epitaxial silicon layer.
Semiconductor wafer of monocrystalline silicon and method of producing the semiconductor wafer
Epitaxially coated semiconductor wafers of monocrystalline silicon comprise a p.sup.+-doped substrate wafer and a p-doped epitaxial layer of monocrystalline silicon which covers an upper side face of the substrate wafer; an oxygen concentration of the substrate wafer of not less than 5.3×10.sup.17 atoms/cm.sup.3 and not more than 6.0×10.sup.17 atoms/cm.sup.3; a resistivity of the substrate wafer of not less than 5 mΩcm and not more than 10 mΩcm; and
the potential of the substrate wafer to form BMDs as a result of a heat treatment of the epitaxially coated semiconductor wafer, where a high density of BMDs has a maximum close to the surface of the substrate wafer.
SEMICONDUCTOR STRUCTURE MANUFACTURING METHODS AND SEMICONDUCTOR STRUCTURES
The present invention provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a substrate; forming an amorphous layer on the substrate, wherein the amorphous layer includes a plurality of patterns to expose part of the substrate; forming a metal nitride layer on the amorphous layer; removing the amorphous layer to form a plurality of cavities between the substrate and the metal nitride layer; removing the substrate to form the semiconductor structure. In the present invention, an amorphous layer is formed on the substrate, and a metal nitride layer is formed on the amorphous layer. The amorphous layer can inhibit slip or dislocation during epitaxial growth, thereby improving the quality of the metal nitride layer and improving the performance of the semiconductor structure, while the metal nitride layer can realize self-supporting.
Method of gap filling using conformal deposition-annealing-etching cycle for reducing seam void and bending
A method includes depositing a silicon layer, which includes first portions over a plurality of strips, and second portions filled into trenches between the plurality of strips. The plurality of strips protrudes higher than a base structure. The method further includes performing an anneal to allow parts of the first portions of the silicon layer to migrate toward lower parts of the plurality of trenches, and performing an etching on the silicon layer to remove some portions of the silicon layer.
METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE INCLUDING THE SUBSTRATE STRUCTURE
A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from −20 μm to −40 μm.