Patent classifications
H01L21/02428
GALLIUM-NITRIDE BASED DEVICES IMPLEMENTING AN ENGINEERED SUBSTRATE STRUCTURE
An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.
SEMICONDUCTOR STRUCTURE FORMATION
Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.
Wafer composite and method for producing a semiconductor component
A wafer composite is provided which includes an auxiliary substrate, a donor substrate and a sacrificial layer formed between the auxiliary substrate and the donor substrate. Functional elements of the semiconductor component are formed in a component layer, including at least one partial layer of the donor substrate. The auxiliary substrate is then separated from the component layer by heat input into the sacrificial layer.
Methods of manufacturing engineered substrate structures for power and RF applications
A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.
Method and system for forming doped regions by diffusion gallium nitride materials
A method of forming doped regions by diffusion in gallium nitride materials includes providing a substrate structure including a gallium nitride layer and forming a mask on the gallium nitride layer. The mask exposes one or more portions of a top surface of the gallium nitride layer. The method also includes depositing a magnesium-containing gallium nitride layer on the one or more portions of the top surface of the gallium nitride layer and concurrently with depositing the magnesium-containing gallium nitride layer, forming one or more magnesium-doped regions in the gallium nitride layer by diffusing magnesium into the gallium nitride layer through the one or more portions. The magnesium-containing gallium nitride layer provides a source of magnesium dopants. The method further includes removing the magnesium-containing gallium nitride layer and removing the mask.
DEFECT-FREE HETEROGENEOUS SUBSTRATES
In example implementations of a heterogeneous substrate, the heterogeneous substrate includes a first material having an air trench, a second material coupled to the first material, a dielectric mask on a first portion of the second material and an active region that is grown on a remaining portion of the second material. An air gap may be formed in the air trench by the second material coupled to the first material. Defects in the second material may be contained to an area below the dielectric mask and the active region may remain defect free.
Power and RF devices implemented using an engineered substrate structure
An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.
ENGINEERED SUBSTRATE STRUCTURES FOR POWER AND RF APPLICATIONS
A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.
Template-Assisted Synthesis of 2D Nanosheets Using Nanoparticle Templates
A template-assisted method for the synthesis of 2D nanosheets comprises growing a 2D material on the surface of a nanoparticle substrate that acts as a template for nanosheet growth. The 2D nanosheets may then be released from the template surface, e.g. via chemical intercalation and exfoliation, purified, and the templates may be reused.
Method for evaluating surface defects of substrate to be bonded
A method for evaluating surface defects of a substrate to be bonded: preparing a mirror-polished silicon single crystal substrate; inspecting surface defects on the mirror-polished silicon single crystal substrate; depositing a polycrystalline silicon layer on a surface of the silicon single crystal substrate subjected to the defect inspection; performing mirror edge polishing to the silicon single crystal substrate having the polycrystalline silicon layer deposited thereon; polishing a surface of the polycrystalline silicon layer; inspecting surface defects on the polished polycrystalline silicon layer; and comparing coordinates of defects detected at the step of inspecting the surface defects on the silicon single crystal substrate with counterparts detected at the step of inspecting the surface defects on the polycrystalline silicone layer and determining quality of the silicon single crystal substrate having the polycrystalline silicon layer as a substrate to be bonded on the basis of presence/absence of defects present at the same position.