The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, a semiconductor structure includes an epitaxial oxide heterostructure, comprising: a substrate; a first epitaxial oxide layer comprising Li(Al.sub.x1Ga.sub.1−x1)O.sub.2 wherein 0≤x1≤1; and a second epitaxial oxide layer comprising (Al.sub.x2Ga.sub.1−x2).sub.2O.sub.3 wherein 0≤x2≤1.

Provided are dielectric thin-film structures and electronic devices including the same. The dielectric thin-film structure includes a substrate, and a dielectric layer provided on the substrate. The dielectric layer including a tetragonal crystal structure, and crystal grains including a proportion of the crystal grains preferentially oriented such that at least one of a <hk0>, <h00>, or <0k0> direction of a crystal lattice is parallel to or forms an angle of less than 45 degrees an out-of-plane orientation.

The present disclosure describes epitaxial oxide integrated circuits. In some embodiments, an integrated circuit comprises: a field effect transistor (FET), comprising: a substrate comprising a first oxide material; an epitaxial buried ground plane on the substrate and comprising a second oxide material; an epitaxial buried oxide layer on the epitaxial buried ground plane and comprising a third oxide material; an epitaxial semiconductor layer on the epitaxial buried oxide layer and comprising a fourth oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer and comprising a fifth oxide material with a second bandgap; electrical contacts; and a waveguide coupled to the field effect transistor. The waveguide can comprise: the epitaxial buried ground plane; the epitaxial buried oxide layer; and a signal conductor, wherein the epitaxial buried oxide layer is between the signal conductor and the epitaxial buried ground plane.

The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, a semiconductor structure includes an epitaxial oxide heterostructure, comprising: a substrate; a first epitaxial oxide layer comprising (Ni.sub.x1Mg.sub.y1Zn.sub.1−x1−yl).sub.2GeO.sub.4 wherein 0≤x1≤1 and 0≤y1≤1; and a second epitaxial oxide layer comprising (Ni.sub.x2Mg.sub.y2Zn.sub.1−x2−y2).sub.2GeO.sub.4 wherein 0≤x2≤1 and 0≤y2≤1. In some cases, either: x1≠x2 and y1=y2; x1=x2 and y1≠y2; or x1≠x2 and y1≠y2. In some embodiments, a semiconductor structure includes an epitaxial oxide heterostructure, comprising: a substrate; a first epitaxial oxide layer comprising (Mg.sub.x1Zn.sub.1−x1)(Al.sub.y1Ga.sub.1−y1).sub.2O.sub.4 wherein 0≤x1≤1 and 0≤y1≤1; and a second epitaxial oxide layer comprising (Ni.sub.x2Mg.sub.y2Zn.sub.1−x2−y2).sub.2GeO.sub.4 wherein 0≤x2≤1 and 0≤y2≤1.

A method for fabrication of an InGaN semiconductor template, comprising growing an InGaN pyramid having inclined facets on a semiconductor substrate; processing the pyramid by removing semiconductor material to form a truncated pyramid having a first upper surface; growing InGaN, over the first upper surface, to form an InGaN template layer having a c-plane crystal facet forming a top surface. The InGaN semiconductor template is suitable for further fabrication of semiconductor devices, such as microLEDs configured to emit red, green or blue light.

A semiconductor device includes a substrate, a first semiconductor fin and a gate stack. The first semiconductor fin is over the substrate and includes a first germanium-containing layer and a second germanium-containing layer over the first germanium-containing layer. The first germanium-containing layer has a germanium atomic percentage higher than a germanium atomic percentage of the second germanium-containing layer. The gate stack is across the first semiconductor fin.

A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.

Provided are dielectric thin-film structures and electronic devices including the same. The dielectric thin-film structure includes a substrate, and a dielectric layer provided on the substrate. The dielectric layer including a tetragonal crystal structure, and crystal grains including a proportion of the crystal grains preferentially oriented such that at least one of a <hk0>, <h00>, or <0k0> direction of a crystal lattice is parallel to or forms an angle of less than 45 degrees an out-of-plane orientation.

A single crystal semiconductor includes a strain compensation layer; an amorphous substrate disposed on the strain compensation layer; a lattice matching layer disposed on the amorphous substrate and including two or more single crystal layers; and a single crystal semiconductor layer disposed on the lattice matching layer, the lattice matching layer including a direction control film disposed on the amorphous substrate and including a single crystal structure, and a buffer layer including a material different from that of the direction control film, the buffer layer being disposed on the direction control film and including a single crystal structure.

According to one embodiment, a method for manufacturing a silicon carbide base body is disclosed. The method can include preparing a first base body including silicon carbide. The first base body includes a first base body surface tilted with respect to a (0001) plane of the first base body. A first line segment where the first base body surface and the (0001) plane of the first base body intersect is along a [11-20] direction of the first base body. The method can include forming a first layer at the first base body surface. The first layer includes silicon carbide. The method can include removing a portion of the first layer. The first-layer surface is tilted with respect to a (0001) plane of the first layer. A second line segment where the first-layer surface and the (0001) plane of the first layer intersect is along a [−1100] direction.