H01L21/02516

Direct formation of hexagonal boron nitride on silicon based dielectrics

A scalable process for fabricating graphene/hexagonal boron nitride (h-BN) heterostructures is disclosed herein. The process includes (BN).sub.XH.sub.y-radical interfacing with active sites on silicon nitride coated silicon (Si.sub.3N.sub.4/Si) surfaces for nucleation and growth of large-area, uniform and ultrathin h-BN directly on Si.sub.3N.sub.4/Si substrates (B/N atomic ratio=1:1.11±0.09). Further, monolayer graphene van der Waals bonded with the produced h-BN surface benefits from h-BN's reduced roughness (3.4 times) in comparison to Si.sub.3N.sub.4/Si. Because the reduced surface roughness leads to reduction in surface roughness scattering and charge impurity scattering, therefore an enhanced intrinsic charge carrier mobility (3 folds) for graphene on h-BN/Si.sub.3N.sub.4/Si is found.

Direct formation of hexagonal boron nitride on silicon based dielectrics

A scalable process for fabricating graphene/hexagonal boron nitride (h-BN) heterostructures is disclosed herein. The process includes (BN).sub.XH.sub.y-radical interfacing with active sites on silicon nitride coated silicon (Si.sub.3N.sub.4/Si) surfaces for nucleation and growth of large-area, uniform and ultrathin h-BN directly on Si.sub.3N.sub.4/Si substrates (B/N atomic ratio=1:1.11±0.09). Further, monolayer graphene van der Waals bonded with the produced h-BN surface benefits from h-BN's reduced roughness (3.4 times) in comparison to Si.sub.3N.sub.4/Si. Because the reduced surface roughness leads to reduction in surface roughness scattering and charge impurity scattering, therefore an enhanced intrinsic charge carrier mobility (3 folds) for graphene on h-BN/Si.sub.3N.sub.4/Si is found.

Single-crystal hexagonal boron nitride layer and method forming same

A method includes depositing a copper layer over a first substrate, annealing the copper layer, depositing a hexagonal boron nitride (hBN) film on the copper layer, and removing the hBN film from the copper layer. The hBN film may be transferred to a second substrate.

Methods of exfoliating single crystal materials

Disclosed herein are methods for exfoliation of single crystals allowing for growth of high crystalline quality on the exfoliated surfaces for III-V photovoltaics. Also disclosed herein are methods for growing GaAs (111) on layered-2D Bi.sub.2Se.sub.3 (0001) substrates in an MOCVD reactor.

Seed layer for ferroelectric memory device and manufacturing method thereof

A method includes: providing a bottom layer; depositing a first seed layer over the bottom layer, the first seed layer having at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer; and cooling the dielectric layer, wherein after the cooling the dielectric layer becomes a ferroelectric layer.

METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE AND NITRIDE SEMICONDUCTOR SUBSTRATE

A method for manufacturing a nitride semiconductor substrate by using a vapor phase growth method includes: a step of preparing a base substrate that is constituted by a material different from a single crystal of a group III nitride semiconductor; a step of growing a base layer on the upper side of the base substrate; a first step of growing a first layer by epitaxially growing a single crystal of a group III nitride semiconductor directly on the base surface of the base layer, the single crystal of the group III nitride semiconductor having a top surface at which a (0001) plane is exposed, and a plurality of recessed portions formed by inclined interfaces other than the (0001) plane being generated in the top surface; and a second step of growing a second layer that has a mirror-finished surface.

Method of forming gallium nitride film over SOI substrate

A method of forming a GaN film includes following steps. A silicon-on-insulator (SOI) substrate is provided. The SOI substrate includes a substrate, an insulator layer and a silicon layer. The insulator layer is disposed on the substrate and the silicon layer is disposed on the insulator layer. The silicon layer is pattered into a patterned silicon layer including a plurality of recessed features. Each recessed feature has a sidewall. A plurality of GaN structures are epitaxially grown from the sidewalls, and the GaN structures are separated from each other. The GaN structures are continuously epitaxially grown vertically and horizontally to merge the GaN structures over top of the patterned silicon layer to form a GaN layer.

METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE, NITRIDE SEMICONDUCTOR SUBSTRATE, AND LAMINATE STRUCTURE

A method of making a semiconductor including a step of preparing a base substrate; a first step of epitaxially growing a single crystal of a group III nitride semiconductor having a top surface with (0001) plane exposed, directly on the main surface of the base substrate, forming a plurality of concaves composed of inclined interfaces other than the (0001) plane on the top surface, gradually expanding the inclined interfaces toward an upper side of the main surface of the base substrate, making the (0001) plane disappear from the top surface, and growing a first layer whose surface is composed only of the inclined interfaces; and a second step of epitaxially growing a single crystal of a group III nitride semiconductor on the first layer, making the inclined interfaces disappear, and growing a second layer having a mirror surface, and a semiconductor made thereby.

Nitride semiconductor template and nitride semiconductor device

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) preparing a pattern-substrate as the substrate, with a concavo-convex pattern formed on a front surface of the pattern-substrate, (b) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the concavo-convex pattern of the pattern-substrate, in a thickness of not flattening a front surface; (c) applying annealing to the first layer; and (d) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum so as to overlap on the first layer after performing (c), and in a thickness of flattening a front surface, and constituting the nitride semiconductor layer by the first layer and the second layer.

Single-crystal rare earth oxide grown on III-V compound

A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y.sub.2O.sub.3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.