Patent classifications
H01L21/02609
Film forming method and crystalline multilayer structure
The disclosure provides a film forming method that enables to obtain an epitaxial film with reduced defects such as dislocations due to a reduced facet growth industrially advantageously, even if the epitaxial film has a corundum structure. When forming an epitaxial film on a crystal-growth surface of a corundum-structured crystal substrate directly or via another layer, using the crystal substrate having an uneven portion on the crystal-growth surface of the crystal substrate, generating and floating atomized droplets by atomizing a raw material solution including a metal; carrying the floated atomized droplets onto a surface of the crystal substrate by using a carrier gas; and causing a thermal reaction of the atomized droplets in a condition of a supply rate limiting state.
SEMICONDUCTOR STRUCTURE WITH DIFFERENT CRYSTALLINE ORIENTATIONS
A semiconductor structure comprises a semiconductor substrate including a first silicon substrate component having a first crystalline orientation and a second silicon substrate component over the first silicon substrate and having a second crystalline orientation different from the first crystalline orientation. The semiconductor substrate defines a trench extending through the second silicon substrate component and at least partially within the first silicon substrate component. A gallium nitride structure is disposed within the trench of the semiconductor substrate.
Method for manufacturing sputtering target, method for forming oxide film, and transistor
A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
Method of manufacturing a facet-free source/drain epitaxial structure having an amorphous or polycrystalline layer
The present disclosure is directed to source/drain (S/D) epitaxial structures with enlarged top surfaces. In some embodiments, the S/D epitaxial structures include a first crystalline epitaxial layer comprising facets; a non-crystalline epitaxial layer on the first crystalline layer; and a second crystalline epitaxial layer on the non-crystalline epitaxial layer, where the second crystalline epitaxial layer is substantially facet-free.
Finfet Device Having A Channel Defined In A Diamond-Like Shape Semiconductor Structure
The present disclosure provides a FinFET device. The FinFET device comprises a semiconductor substrate of a first semiconductor material; a fin structure of the first semiconductor material overlying the semiconductor substrate, wherein the fin structure has a top surface of a first crystal plane orientation; a diamond-like shape structure of a second semiconductor material disposed over the top surface of the fin structure, wherein the diamond-like shape structure has at least one surface of a second crystal plane orientation; a gate structure disposed over the diamond-like shape structure, wherein the gate structure separates a source region and a drain region; and a channel region defined in the diamond-like shape structure between the source and drain regions.
RARE EARTH-CONTAINING SiC SUBSTRATE AND METHOD FOR PRODUCING SiC EPITAXIAL LAYER
A rare earth-containing SiC substrate includes a rare earth element and Al. A concentration of the rare earth element is from 1×10.sup.16 atoms/cm.sup.3 to 1×10.sup.19 atoms/cm.sup.3 inclusive and a concentration of Al is from 1×10.sup.16 atoms/cm.sup.3 to 1×10.sup.21 atoms/cm.sup.3 inclusive.
Method for manufacturing a vertical power device including an III-nitride semiconductor structure
A method for manufacturing an III-nitride semiconductor structure is provided. The method includes providing a substrate comprising a first layer having an upper surface of monocrystalline III-nitride material; providing, over the upper surface, a patterned dielectric layer comprising a first dielectric feature; loading the substrate into a process chamber; exposing the substrate to a first gas mixture comprising at least one Group III-metal organic precursor gas, a nitrogen containing gas and hydrogen gas at a predetermined temperature, thereby forming, on the upper surface, a second layer of a monocrystalline III-nitride material by area selective growth wherein two opposing sidewalls of the dielectric feature are oriented parallel to one of the {11-20} crystal planes of the first layer such that upon formation of the second layer of the monocrystalline III-nitride material, a first trench having tapered sidewalls is formed so that the crystal plane of the second layer parallel to the tapered sidewalls is one of the {1-101} crystal planes.
METHOD FOR PRODUCING A LAYER OF ALUMINIUM NITRIDE (ALN) ON A STRUCTURE OF SILICON OR III-V MATERIALS
A method for producing an aluminium nitride (AlN)-based layer on a structure with the basis of silicon (Si) or with the basis of a III-V material, may include several deposition cycles performed in a plasma reactor comprising a reaction chamber inside which is disposed a substrate having the structure. Each deposition cycle may include at least the following: deposition of aluminium-based species on an exposed surface of the structure, the deposition including at least one injection into the reaction chamber of an aluminium (Al)-based precursor; and nitridation of the exposed surface of the structure, the nitridation including at least one injection into the reaction chamber of a nitrogen (N)-based precursor and the formation in the reaction chamber of a nitrogen-based plasma. During the formation of the nitrogen-based plasma, a non-zero polarisation voltage V.sub.bias_.sub.substrate may be applied to the substrate.
Methods for polysilicon characterization
Aspects of the disclosure provide methods for polysilicon characterization. The method includes receiving image data of a polysilicon structure formed on a sample substrate. The image data is in a spatial domain and is generated by transmission electron microscopy (TEM). Further, the method includes extracting frequency spectrum of the image data in a frequency domain. Then, the method includes selecting a subset of the frequency spectrum that corresponds to characteristic of first crystal grains that are of a first orientation, and transforming the selected subset of the frequency spectrum to the spatial domain to construct a first spatial image for the first crystal grains of the first orientation.
ANISOTROPIC EPITAXIAL GROWTH
Generally, examples described herein relate to methods and semiconductor processing systems for anisotropically epitaxially growing a material on a silicon germanium (SiGe) surface. In an example, a surface of silicon germanium is formed on a substrate. Epitaxial silicon germanium is epitaxially grown on the surface of silicon germanium. A first growth rate of the epitaxial silicon germanium is in a first direction perpendicular to the surface of silicon germanium, and a second growth rate of the epitaxial silicon germanium is in a second direction perpendicular to the first direction. The first growth rate is at least 5 times greater than the second growth rate.