Patent classifications
H01L21/02658
PART INCLUDING SILICON CARBIDE LAYER AND MANUFACTURING METHOD THEREOF
The present disclosure relates to a part including silicon carbide layer and manufacturing method thereof, and the manufacturing method according to the present disclosure includes preparing a graphite substrate, and laminating a silicon carbide layer on a surface of the graphite substrate, wherein at the laminating the silicon carbide layer, the silicon carbide layer is laminated such that the thickness of the silicon carbide layer is 0.01 to 1 times the thickness of the graphite substrate, thereby improving the durability of the part including silicon carbide layer.
MANUFACTURING METHOD FOR SEMICONDUCTOR SILICON WAFER
The substrate is doped with P, has a resistivity adjusted to 1.05 mΩ.Math.cm or less, and includes defects, formed in the crystal by the aggregation of P, which are Si—P crystal defects substantially. The method includes a step of forming a silicon oxide film on the backside of the substrate with a thickness of 300 nm or more and 700 nm or less, a step of mirror-polishing the substrate, and after the mirror-polishing step, a heat treatment step of the substrate mounted on a substrate holder made of Si or SiC, on the holder surface a silicon oxide film is formed with the thickness between 200 nm and 500 nm, wherein the thickness X of the silicon oxide film of the holder and the thickness Y of that on the backside of the substrate satisfy a relational expression Y=C−X, where C is a constant between 800 and 1000.
METHOD FOR FORMING AN IMAGE SENSOR
Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.
SUBSTRATE PROCESSING FOR GaN GROWTH
Exemplary semiconductor structures may include a silicon-containing substrate. The structures may include a layer of a metal nitride overlying the silicon-containing substrate. The structures may include a gallium nitride structure overlying the layer of the metal nitride. The structures may include an oxygen-containing layer disposed between the layer of the metal nitride and the gallium nitride structure.
TRANSISTOR, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF HBNC LAYER
A transistor includes a channel layer, a gate stack, and source/drain regions. The channel layer includes a graphene layer and hexagonal boron nitride (hBN) flakes dispersed in the graphene layer. Orientations of the hBN flakes are substantially aligned. The gate stack is over the channel layer. The source/drain regions are aside the gate stack.
Semiconductor structures and methods of forming thereof
A field effect transistor (FET) device includes a substrate, a gate structure over the substrate, a channel region under the gate structure, the channel region including a first semiconductor material, and a second semiconductor material interposed between the first semiconductor material and the substrate. The second semiconductor material is different from the first semiconductor material. An interface of the second semiconductor material with the first semiconductor material has facets. A surface of the second semiconductor material interfacing with the substrate is non-planar.
METHOD FOR MANUFACTURING A COMPOSITE STRUCTURE COMPRISING A THIN LAYER MADE OF MONOCRYSTALLINE SIC ON A CARRIER SUBSTRATE MADE OF SIC
A method for manufacturing a composite structure comprising a thin layer made of monocrystalline silicon carbide arranged on a carrier substrate made of silicon carbide, the method comprising: a) a step of providing a donor substrate made of monocrystalline SiC, the donor substrate comprising a donor layer produced by epitaxial growth on an initial substrate, the donor layer exhibiting a density of crystal defects that is lower than that of the initial substrate; b) a step of ion implantation of light species into the donor layer, in order to form a buried brittle plane delimiting the thin layer between the buried brittle plane and a free face of the donor layer; c) a succession of n steps of formation of carrier layers, with n greater than or equal to 2, the n carrier layers being arranged on the donor layer successively on one another and forming the carrier substrate, each step of formation comprising a chemical vapor deposition, at a temperature of between 400° C. and 1100° C., in order to form a carrier layer made of polycrystalline SiC, the n chemical vapor depositions being carried out at n different temperatures; d) a step of separation along the buried brittle plane, in order to form, on the one hand, a composite structure comprising the thin layer on the carrier substrate and, on the other hand, the remainder of the donor substrate; and e) a step of mechanical and/or chemical treatment(s) of the composite structure.
SEMICONDUCTOR DEVICE
A semiconductor device and a method of manufacturing a semiconductor device according to one or more embodiments are disclosed. An interface layer is formed by implanting ionized impurities into a first layer comprising single-crystalline silicon carbide (SiC). Surfaces of the interface layer and a second layer comprising polycrystalline silicon carbide (SiC) are activated. The activated surfaces of the interface layer and the second layer are contacted and bonded. A covering layer is formed to cover a top surface and sides of the first layer, sides of the interface layer, and sides of the second layer.
Semiconductor Device and Method of Forming Sacrificial Heteroepitaxy Interface to Provide Substantially Defect-Free Silicon Carbide Substrate
A semiconductor device has a first substrate made of a first semiconductor material, such as silicon. A sacrificial layer is formed over a first surface of the first substrate. A seed layer is formed over the sacrificial layer. A compliant layer is formed over a second surface of the first substrate opposite the first surface of the first substrate. A first semiconductor layer made of a second semiconductor material, such as silicon carbide, dissimilar from the first semiconductor material is formed over the sacrificial layer. The first substrate and sacrificial layer are removed leaving the first semiconductor layer substantially defect-free. The first semiconductor layer containing the second semiconductor material is formed at a temperature greater than a melting point of the first semiconductor material. A second semiconductor layer is formed over the first semiconductor layer with an electrical component formed in the second semiconductor layer.
MULTILAYER SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING MULTILAYER SEMICONDUCTOR STRUCTURE
A multilayer semiconductor structure of the present disclosure includes a substrate a buffer layer disposed on the substrate and a semiconductor layer disposed on the buffer layer. A void is provided between the buffer layer and the semiconductor layer.