Patent classifications
H01L21/187
BONDING APPARATUS AND BONDING METHOD
A bonding apparatus includes a first holder, a second holder, a moving unit, a first transforming unit, a second transforming unit and a controller. The first holder holds a first substrate from above. The second holder is provided below the first holder, and holds a second substrate from below. The moving unit moves the first holder and the second holder relative to each other. The first transforming unit makes a central portion of the first substrate held by the first holder protruded downwards. The second transforming unit makes a central portion of the second substrate held by the second holder protruded upwards. The controller performs a control of bringing the central portions into contact with each other. The controller performs a control of changing a protruding amount of the central portion of the first substrate according to a protruding amount of the central portion of the second substrate.
Simplified Structure for a Low Gain Avalanche Diode with Closely Spaced Electrodes
A method for fabricating a low-gain avalanche diode (LGAD) device is provided. The method includes: forming a low-resistivity n-type semiconductor substrate in a first silicon wafer; forming a p-type gain layer in an upper surface of a high-resistivity p-type second silicon wafer; bonding the first and second wafers such that the upper surface of the second wafer proximate the gain layer contacts the semiconductor substrate in the first wafer to form a bonded wafer structure, whereby a back surface of the second wafer becomes an upper surface of the bonded wafer structure; forming a plurality of p-type electrodes in the upper surface of the bonded wafer structure; and forming a conductive layer on at least a portion of the respective p-type electrodes and on a back surface of the semiconductor substrate, the conductive layer providing electrical connection to the LGAD device.
SEMICONDUCTOR DEVICE
A semiconductor device and a method of manufacturing a semiconductor device according to one or more embodiments are disclosed. An interface layer is formed by implanting ionized impurities into a first layer comprising single-crystalline silicon carbide (SiC). Surfaces of the interface layer and a second layer comprising polycrystalline silicon carbide (SiC) are activated. The activated surfaces of the interface layer and the second layer are contacted and bonded. A covering layer is formed to cover a top surface and sides of the first layer, sides of the interface layer, and sides of the second layer.
SILICON DOUBLE-WAFER SUBSTRATES FOR GALLIUM NITRIDE LIGHT EMITTING DIODES
Two, standard dimension, Si wafers, one <111>-oriented and the other <100>-oriented for example, are bonded together to form a two-ply substrate. Such an Si double-wafer substrate is stiffer than either a double-thickness <111>-oriented or <100>-oriented wafer. C-beveling on the two constituent wafers results in a B-bevel edge of the two-ply substrate that does not create stress risers. Also, standard thickness wafers are commercially available. GaN epitaxial layer is then grown on this two-ply substrate.
Bonding method for cleaning non-bonding surface of substrate
A bonding system includes a surface modifying apparatus configured to modify a bonding surface of a first substrate and a bonding surface of a second substrate; a surface hydrophilizing apparatus configured to hydrophilize the modified bonding surface of the first substrate and the modified bonding surface of the second substrate; a bonding apparatus configured to perform bonding of the hydrophilized bonding surface of the first substrate and the hydrophilized bonding surface of the second substrate in a state that the bonding surfaces face each other; and a cleaning apparatus configured to clean, before the bonding is performed, a non-bonding surface of, between the first substrate and the second substrate, at least one which is maintained flat when the bonding is performed, the not-bonding surface being opposite to the bonding surface.
Simultaneous bonding approach for high quality wafer stacking applications
In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.
FLUID COOLING FOR DIE STACKS
The disclosed technology relates to microelectronic devices that can dissipate heat efficiently. In some aspects, such a microelectronic device includes a first semiconductor element and at least one second semiconductor element disposed on the first semiconductor element. The microelectronic device may further include a fluidic cooling unit disposed on the first semiconductor element. In some embodiment, the fluidic cooling unit may include a cavity structure to contain a fluid. In some embodiment, the fluidic cooling unit may include a thermal pathway to transfer heat away from the first semiconductor element.
Semiconductor device, method of manufacturing semiconductor device, and method of recycling substrate
In one embodiment, a method of manufacturing a semiconductor device includes forming a first semiconductor layer including impurity atoms with a first density, on a first substrate, forming a second semiconductor layer including impurity atoms with a second density higher than the first density, on the first semiconductor layer, and forming a porous layer resulting from porosification of at least a portion of the second semiconductor layer. The method further includes forming a first film including a device, on the porous layer, providing a second substrate provided with a second film including a device, and bonding the first and second substrates to sandwich the first and second films. The method further includes separating the first and second substrates from each other such that a first portion of the porous layer remains on the first substrate and a second portion of the porous layer remains on the second substrate.
METHOD FOR ACTIVATING AN EXPOSED LAYER
A method for activating an exposed layer of a structure including a provision of a structure including an exposed layer, a deposition of a layer based on a material of formula Si.sub.aY.sub.bX.sub.c, with X chosen from among fluorine F and chlorine Cl, and Y chosen from among oxygen O and nitrogen N, a, b and c being non-zero positive integers, a treatment of the layer Si.sub.aY.sub.bX.sub.c by an activation plasma based on at least one from among oxygen and nitrogen, the parameters of the deposition of the layer Si.sub.aY.sub.bX.sub.c being chosen so as to obtain a sufficiently low material density such that the layer Si.sub.aY.sub.bX.sub.c is at least partially consumed by the activation plasma.
METHOD FOR ACTIVATING AN EXPOSED LAYER
A method for activating an exposed layer of a structure including a provision of a structure including an exposed layer, and before or after the provision of the structure, a deposition in the reaction chamber of a layer based on a material of chemical formula C.sub.xH.sub.yF.sub.z, at least x and z being non-zero. The method further includes a treatment, in the presence of the structure, of the layer based on a material of chemical formula C.sub.xH.sub.yF.sub.z by an activation plasma based on at least one from among oxygen and nitrogen. The treatment by the activation plasma is configured to consume at least partially the layer based on the material of chemical formula C.sub.xH.sub.yF.sub.z so as to activate the exposed layer of the structure.