A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

A diffusion agent composition that, even when a semiconductor substrate which is an object into which an impurity diffusion ingredient is to be diffused has, on a surface thereof, a three-dimensional structure having nano-scale fine voids on a surface thereof, can be evenly coated on the whole area of an inner surface of the fine voids, whereby boron can be diffused into the semiconductor substrate, and a method for manufacturing a semiconductor substrate using the composition. The composition includes an impurity diffusion ingredient and a hydrolyzable Si compound to produce a silanol group, the impurity diffusion ingredient containing a complex compound containing boron having a specific structure.

A diffusion agent composition that, even when a semiconductor substrate which is an object into which an impurity diffusion ingredient is to be diffused has, on a surface thereof, a three-dimensional structure having nano-scale fine voids on a surface thereof, can be evenly coated on the whole area of an inner surface of the fine voids, whereby boron can be diffused into the semiconductor substrate, and a method for manufacturing a semiconductor substrate using the composition. The composition includes an impurity diffusion ingredient and a hydrolyzable Si compound to produce a silanol group, the impurity diffusion ingredient containing a complex compound containing boron having a specific structure.

A method of making a MOS device, a MOS device containing an aluminum nitride layer, and a CMOS circuit are disclosed. The method includes depositing an aluminum nitride layer on a structure including a silicon layer, depositing a dopant ink on the structure, and diffusing the dopant through the aluminum nitride layer into the silicon layer. The structure also includes a gate oxide layer on the silicon layer and a gate on the gate oxide layer. The dopant ink includes a dopant and a solvent. The MOS device includes a silicon layer, a gate oxide layer on the silicon layer, a gate on the gate oxide layer, and an aluminum nitride layer on the gate. The silicon layer includes a dopant on opposite sides of the gate.

A method of making a MOS device, a MOS device containing an aluminum nitride layer, and a CMOS circuit are disclosed. The method includes depositing an aluminum nitride layer on a structure including a silicon layer, depositing a dopant ink on the structure, and diffusing the dopant through the aluminum nitride layer into the silicon layer. The structure also includes a gate oxide layer on the silicon layer and a gate on the gate oxide layer. The dopant ink includes a dopant and a solvent. The MOS device includes a silicon layer, a gate oxide layer on the silicon layer, a gate on the gate oxide layer, and an aluminum nitride layer on the gate. The silicon layer includes a dopant on opposite sides of the gate.

A laser doping device includes: a solution supply system configured to supply a solution containing dopant to a doping region; a pulse laser system configured to output pulse laser light including a plurality of pulses, the pulse laser light transmitting through the solution; a first control unit configured to control a number of pulses of the pulse laser light for allowing the doping region to be irradiated, and to control a fluence of the pulse laser light in the doping region; and a second control unit configured to control a flow velocity of the solution so as to move bubbles, from the doping region, occurring in the solution every time of irradiation with the pulse.

A laser doping device includes: a solution supply system configured to supply a solution containing dopant to a doping region; a pulse laser system configured to output pulse laser light including a plurality of pulses, the pulse laser light transmitting through the solution; a first control unit configured to control a number of pulses of the pulse laser light for allowing the doping region to be irradiated, and to control a fluence of the pulse laser light in the doping region; and a second control unit configured to control a flow velocity of the solution so as to move bubbles, from the doping region, occurring in the solution every time of irradiation with the pulse.

A reverse blocking IGBT is manufactured using a silicon wafer sliced from a single crystal silicon ingot which is manufactured by a floating method using a single crystal silicon ingot manufactured by a Czochralski method as a raw material. A separation layer for ensuring a reverse blocking performance of the reverse blocking IGBT is formed by diffusing impurities implanted into the silicon wafer using a thermal diffusion process. The thermal diffusion process for forming the separation layer is performed in an inert gas atmosphere at a temperature equal to or more than 1290 C. and less than the melting point of silicon. In this way, no crystal defect occurs in the silicon wafer and it is possible to prevent the occurrence of a reverse breakdown voltage defect or a forward defect in the reverse blocking IGBT and thus improve the yield of a semiconductor element.

A reverse blocking IGBT is manufactured using a silicon wafer sliced from a single crystal silicon ingot which is manufactured by a floating method using a single crystal silicon ingot manufactured by a Czochralski method as a raw material. A separation layer for ensuring a reverse blocking performance of the reverse blocking IGBT is formed by diffusing impurities implanted into the silicon wafer using a thermal diffusion process. The thermal diffusion process for forming the separation layer is performed in an inert gas atmosphere at a temperature equal to or more than 1290 C. and less than the melting point of silicon. In this way, no crystal defect occurs in the silicon wafer and it is possible to prevent the occurrence of a reverse breakdown voltage defect or a forward defect in the reverse blocking IGBT and thus improve the yield of a semiconductor element.

A silicon-on-insulator substrate includes: (1) a high-resistivity base layer including silicon and a trap-rich region including arsenic diffused within a first side of the high-resistivity base layer, wherein the trap-rich region has a thickness that is in a range of 1 to 10 microns and a trap density that is in a range of 0.8*10.sup.10 cm.sup.2 eV.sup.?1 to 1.2*10.sup.10 cm.sup.2 eV.sup.?1, wherein the high-resistivity base layer has resistivity in a range of 50 to 100 ohm-meters and a thickness in a range of 500 to 700 microns; (2) a silicon dioxide layer positioned on the first side of the high-resistivity base layer and having a thickness that is in a range of 1000 to 5000 angstroms; and (3) a transfer layer positioned on the silicon dioxide layer, wherein the transfer layer comprises a silicon wafer having a thickness that is a range of 500 to 5000 angstroms.