Patent classifications
H01L21/324
Source and drain structure with reduced contact resistance and enhanced mobility
A method includes forming a fin structure on the substrate, wherein the fin structure includes a first fin active region; a second fin active region; and an isolation feature separating the first and second fin active regions; forming a first gate stack on the first fin active region and a second gate stack on the second fin active region; performing a first recessing process to a first source/drain region of the first fin active region by a first dry etch; performing a first epitaxial growth to form a first source/drain feature on the first source/drain region; performing a fin sidewall pull back (FSWPB) process to remove a dielectric layer on the second fin active region; and performing a second epitaxial growth to form a second source/drain feature on a second source/drain region of the second fin active region.
Source and drain structure with reduced contact resistance and enhanced mobility
A method includes forming a fin structure on the substrate, wherein the fin structure includes a first fin active region; a second fin active region; and an isolation feature separating the first and second fin active regions; forming a first gate stack on the first fin active region and a second gate stack on the second fin active region; performing a first recessing process to a first source/drain region of the first fin active region by a first dry etch; performing a first epitaxial growth to form a first source/drain feature on the first source/drain region; performing a fin sidewall pull back (FSWPB) process to remove a dielectric layer on the second fin active region; and performing a second epitaxial growth to form a second source/drain feature on a second source/drain region of the second fin active region.
Methods for manufacturing a MOSFET
A MOSFET includes a semiconductor body having a first side, a drift region, a body region forming a first pn-junction with the drift region, a source region forming a second pn-junction with the body region, in a vertical cross-section, a dielectric structure on the first side and having an upper side; a first gate electrode, a second gate electrode, a contact trench between the first and second gate electrodes, extending through the dielectric structure to the source region, in a horizontal direction a width of the contact trench has, in a first plane, a first value, and, in a second plane, a second value which is at most about 2.5 times the first value, and a first contact structure arranged on the dielectric structure having a through contact portion arranged in the contact trench, and in Ohmic contact with the source region.
Methods for manufacturing a MOSFET
A MOSFET includes a semiconductor body having a first side, a drift region, a body region forming a first pn-junction with the drift region, a source region forming a second pn-junction with the body region, in a vertical cross-section, a dielectric structure on the first side and having an upper side; a first gate electrode, a second gate electrode, a contact trench between the first and second gate electrodes, extending through the dielectric structure to the source region, in a horizontal direction a width of the contact trench has, in a first plane, a first value, and, in a second plane, a second value which is at most about 2.5 times the first value, and a first contact structure arranged on the dielectric structure having a through contact portion arranged in the contact trench, and in Ohmic contact with the source region.
Methods for forming fluorine doped high electron mobility transistor (HEMT) devices
A semiconductor device includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a source/drain pair, a fluorinated region, and a gate. The channel layer is disposed over the substrate. The barrier layer is disposed over the channel layer. The compound semiconductor layer is disposed over the barrier layer. The source/drain pair is disposed over the substrate, wherein the source and the drain are located on opposite sides of the compound semiconductor layer. The fluorinated region is disposed in the compound semiconductor layer. The gate is disposed on the compound semiconductor layer.
Semiconductor structure and method for forming the same
A semiconductor structure is provided. The semiconductor structure includes a first gate-all-around FET over a substrate, and the first gate-all-around FET includes first nanostructures and a first gate stack surrounding the first nanostructures. The semiconductor structure also includes a first FinFET adjacent to the first gate-all-around FET, and the first FinFET includes a first fin structure and a second gate stack over the first fin structure. The semiconductor structure also includes a gate-cut feature interposing the first gate stack of the first gate-all-around FET and the second gate stack of the first FinFET.
APPARATUS AND METHOD FOR HEATING A SUBSTRATE
Apparatus and method for heating a substrate. The apparatus including a heater and a substrate holder with a substrate holder surface, wherein the substrate to be heated can be placed on the substrate holder surface, the apparatus further includes means for exerting forces on the heater, the apparatus further includes a control unit for controlling the means, wherein the heater is deformable by the means.
APPARATUS AND METHOD FOR HEATING A SUBSTRATE
Apparatus and method for heating a substrate. The apparatus including a heater and a substrate holder with a substrate holder surface, wherein the substrate to be heated can be placed on the substrate holder surface, the apparatus further includes means for exerting forces on the heater, the apparatus further includes a control unit for controlling the means, wherein the heater is deformable by the means.
Radiation Control in Semiconductor Processing
The present disclosure describes a method for controlling radiation conditions and an example system for performing the method. The method includes sending a first setting to configure a radiation device to provide radiation to a substrate undergoing a process operation in a process chamber of the radiation device. The method further includes receiving radiation energy data measured at a plurality of locations of the process chamber and receiving measurement data measured on the substrate during the process operation. The method further includes in response to a variance of the radiation energy data being above a first predetermined threshold and in response to a difference between reference data and the measurement data being above a second predetermined threshold, sending a second setting to configure the radiation device to provide radiation to the substrate.
Radiation Control in Semiconductor Processing
The present disclosure describes a method for controlling radiation conditions and an example system for performing the method. The method includes sending a first setting to configure a radiation device to provide radiation to a substrate undergoing a process operation in a process chamber of the radiation device. The method further includes receiving radiation energy data measured at a plurality of locations of the process chamber and receiving measurement data measured on the substrate during the process operation. The method further includes in response to a variance of the radiation energy data being above a first predetermined threshold and in response to a difference between reference data and the measurement data being above a second predetermined threshold, sending a second setting to configure the radiation device to provide radiation to the substrate.