H01L21/383

FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAME

A memory cell includes a transistor over a semiconductor substrate. The transistor includes a ferroelectric layer arranged along a sidewall of a word line. The ferroelectric layer includes a species with valence of 5, valence of 7, or a combination thereof. An oxide semiconductor layer is electrically coupled to a source line and a bit line. The ferroelectric layer is disposed between the oxide semiconductor layer and the word line.

Thin film transistor and manufacturing method thereof, array substrate and display device

A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.

Thin film transistor, method for producing same and display device

A TFT includes an oxide semiconductor layer including a conductive region electrically connected to a source electrode, a conductive region electrically connected to a drain electrode, a channel region being an oxide semiconductor region that overlaps a gate electrode, and at least one resistive region being an oxide semiconductor region provided between the channel region and a conductive region adjacent to the channel region.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20220149174 · 2022-05-12 · ·

A semiconductor device includes: a semiconductor substrate; a semiconductor layer of a first conductivity type that is deposited on a surface of the semiconductor substrate; a trench that is formed on a surface of the semiconductor layer; an insulating film that covers a bottom surface of the trench and a lateral surface of the trench; a conductive body that fills inside the trench that is covered by the insulating film; a second conductive type region that is formed in the semiconductor layer, is arranged under the trench, and is within a region of the trench in a plan view of the semiconductor substrate; and a metal film that is electrically connected to the conductive body and forms a Schottky barrier with the surface of the semiconductor layer.

SEMICONDUCTOR DEVICE

The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.

SEMICONDUCTOR DEVICE

The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.

Semiconductor device and method for manufacturing the same

A semiconductor device includes: a first semiconductor layer having an N conductive type and made of a gallium oxide-based semiconductor; and a second semiconductor layer made of a gallium oxide-based semiconductor, in contact with the first semiconductor layer, and having the N conductive type with an electrically active donor concentration higher than an electrically active donor concentration of the first semiconductor layer. A difference between a donor concentration of the first semiconductor layer and a donor concentration of the second semiconductor layer is smaller than a difference between the electrically active donor concentration of the first semiconductor layer and the electrically active donor concentration of the second semiconductor layer.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20230369417 · 2023-11-16 ·

A semiconductor device includes: a first semiconductor layer having an N conductive type and made of a gallium oxide-based semiconductor; and a second semiconductor layer made of a gallium oxide-based semiconductor, in contact with the first semiconductor layer, and having the N conductive type with an electrically active donor concentration higher than an electrically active donor concentration of the first semiconductor layer. A difference between a donor concentration of the first semiconductor layer and a donor concentration of the second semiconductor layer is smaller than a difference between the electrically active donor concentration of the first semiconductor layer and the electrically active donor concentration of the second semiconductor layer.

METHOD FOR TUNING ELECTRICAL PROPERTIES OF OXIDE SEMICONDUCTORS AND THE DEVELOPMENT OF HIGHLY CONDUCTIVE P-TYPE AND N-TYPE Ga2O3
20230377903 · 2023-11-23 · ·

A method for bipolar doping of oxide semiconductor materials, a method for doping an oxide semiconductor material n-type, a method for doping an oxide semiconductor material p-type, and products of the same are described. Also described is p-type Ga.sub.2O.sub.3 having hydrogen atoms as dopants. Also described is n-type Ga.sub.2O.sub.3 having hydrogen atoms as dopants, or having both of a sheet carrier concentration of at least about 10.sup.16 cm.sup.2, and/or a mobility of at least about 100 cm.sup.2/VS at room temperature.

METHOD FOR TUNING ELECTRICAL PROPERTIES OF OXIDE SEMICONDUCTORS AND THE DEVELOPMENT OF HIGHLY CONDUCTIVE P-TYPE AND N-TYPE Ga2O3
20230377903 · 2023-11-23 · ·

A method for bipolar doping of oxide semiconductor materials, a method for doping an oxide semiconductor material n-type, a method for doping an oxide semiconductor material p-type, and products of the same are described. Also described is p-type Ga.sub.2O.sub.3 having hydrogen atoms as dopants. Also described is n-type Ga.sub.2O.sub.3 having hydrogen atoms as dopants, or having both of a sheet carrier concentration of at least about 10.sup.16 cm.sup.2, and/or a mobility of at least about 100 cm.sup.2/VS at room temperature.