A manufacturing step for a solar cell module according to an example of an embodiment includes a lamination step of heating a multilayer structure while pressurizing the multilayer structure with a pressing member, the multilayer structure having a structure in which a solar cell, a first substrate, a second substrate, a first encapsulant, and a second encapsulant, are superimposed. In the lamination step, the pressurization by the pressing member is stopped at a temperature at which the loss modulus of the first encapsulant is maintained at 10.sup.3 Pa or more.

A manufacturing step for a solar cell module according to an example of an embodiment includes a lamination step of heating a multilayer structure while pressurizing the multilayer structure with a pressing member, the multilayer structure having a structure in which a solar cell, a first substrate, a second substrate, a first encapsulant, and a second encapsulant, are superimposed. In the lamination step, the pressurization by the pressing member is stopped at a temperature at which the loss modulus of the first encapsulant is maintained at 10.sup.3 Pa or more.

The present disclosure relates to high pressure processing apparatus for semiconductor processing. The apparatus described herein include a high pressure process chamber and a containment chamber surrounding the process chamber. A high pressure fluid delivery module is in fluid communication with the high pressure process chamber and is configured to deliver a high pressure fluid to the process chamber.

The present disclosure relates to high pressure processing apparatus for semiconductor processing. The apparatus described herein include a high pressure process chamber and a containment chamber surrounding the process chamber. A high pressure fluid delivery module is in fluid communication with the high pressure process chamber and is configured to deliver a high pressure fluid to the process chamber.

When a semiconductor element is bonded to a base plate electrode, a cushioning is used for protecting the surface of the semiconductor element. A protrusion having an outwardly cutting shape is formed around an area on the base plate electrode for bonding the semiconductor element to disperse and reduce shear force acting on the cushioning during the bonding, so that no cushioning adheres to the surface of the semiconductor element after bonding.

When a semiconductor element is bonded to a base plate electrode, a cushioning is used for protecting the surface of the semiconductor element. A protrusion having an outwardly cutting shape is formed around an area on the base plate electrode for bonding the semiconductor element to disperse and reduce shear force acting on the cushioning during the bonding, so that no cushioning adheres to the surface of the semiconductor element after bonding.

There is provided a method for manufacturing a transistor from a stack including at least one gate pattern comprising at least one flank, the method including forming at least one gate spacer over at least the flank of the gate pattern; and reducing, after a step of exposure of the stack to a temperature greater than or equal to 600 C., of a dielectric permittivity of the at least one gate spacer, the reducing including at least one ion implantation in a portion at least of a thickness of the at least one gate spacer.

There is provided a method for manufacturing a transistor from a stack including at least one gate pattern comprising at least one flank, the method including forming at least one gate spacer over at least the flank of the gate pattern; and reducing, after a step of exposure of the stack to a temperature greater than or equal to 600 C., of a dielectric permittivity of the at least one gate spacer, the reducing including at least one ion implantation in a portion at least of a thickness of the at least one gate spacer.

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.

Semiconductor device packages may include a support structure having electrical connections therein. Semiconductor device modules may be located on a surface of the support structure. A molding material may at least partially surround each semiconductor module on the surface of the support structure. A thermal management device may be operatively connected to the semiconductor device modules on a side of the semiconductor device modules opposite the support structure. At least some of the semiconductor device modules may include a stack of semiconductor dice, at least two semiconductor dice in the stack being secured to one another by diffusion of electrically conductive material of electrically conductive elements into one another.