A semiconductor device includes a substrate, an insulating layer provided over the substrate, a collection of metal particles exposed on the surface of the insulating layer, and a diamond layer provided on the surface of the insulating layer on which the metal particles are exposed. By controlling the surface density and particle size of the metal particles on the surface of the insulating layer, the surface density of diamond nuclei that are formed on the surface is controlled. Diamond grains are formed by crystal growth using the diamond nuclei as starting material, thereby forming a diamond layer. The control of the surface density of the diamond nuclei results in forming, by the crystal growth, the diamond grains with a grain size exhibiting a relatively high thermal conductivity in the crystal growth initial layer of the diamond layer and improving the thermal conductivity between the diamond layer and the substrate.

A multiple chip carrier assembly including a carrier having a first surface and a second surface is attached to a plurality of chips is described. The plurality of chips include a first chip and a second chip. Each of the chips has first surface with a first set of solder balls for connecting to a package and a second set of solder balls for connecting to a high signal density bridge element. A second surface of each chip is bonded to the first surface of the carrier. A package has a first surface which is connected to the first sets of solder balls of the first and second chips. A high signal density bridge element having high signal density wiring on one or more layers is connected to the second sets of solder balls of the first and second chips. The bridge element is disposed between the first surface of the package and the first surfaces of the first and second chips.

A method includes obtaining an active feature layer having a first surface bearing one or more active feature areas. A first capacitor plate of a first capacitor is formed on an interior surface of a cap. A second capacitor plate of the first capacitor is formed on an exterior surface of the cap. The first capacitor plate of the first capacitor overlays and is spaced apart from the second capacitor plate of the first capacitor along a direction that is orthogonal to the exterior surface of the cap to form the first capacitor. The cap is coupled with the first surface of the active feature layer such that the second capacitor plate of the first capacitor is in electrical communication with at least a first active feature of the active feature layer. The cap is bonded with the passive layer substrate.

A wafer-scale die packaging device is fabricated by providing a high-k glass carrier substrate having a ceramic region which includes a defined waveguide area and extends to a defined die attach area, and then forming, on a first glass carrier substrate surface, a differential waveguide launcher having a pair of signal lines connected to a radiating element that is positioned adjacent to an air cavity and surrounded by a patterned array of conductors disposed over the ceramic region in a waveguide conductor ring. After attaching a die to the glass carrier substrate to make electrical connection to the differential waveguide launcher, a molding compound is formed to cover the die, differential waveguide launcher, and air cavity, and an array of conductors is formed in the molding compound to define a first waveguide interface perimeter surrounding a first waveguide interface interior.

A high-strength zirconia-alumina composite ceramic substrate suitable for semiconductor devices has been invented. It is manufactured by a procedure starting with mixing powder formula of alumina, zirconia, and a self-made synthetic additive for ball milling in an organic solvent at room temperature. The resulting mixture is homogenously dispersed and is then subjected to the steps of slurry preparation, degassing, green embryo forming, punching, calculation, and sintering to yield the final composite ceramic substrate with an excellent mechanical property of three-point bending strength>600 MPa and superior thermoelectric properties of thermal conductivity>26 W/mK, insulation resistance>10.sup.14 .Math.cm and surface leakage current (150 C.)<200 nA.

A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500 C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

Provided are a semiconductor module in which bonding properties between an insulated substrate and a sealing resin is improved and a method for manufacturing the semiconductor module. A semiconductor module 50 is provided with: an insulated substrate 23; a circuit pattern 24 that is formed on the insulated substrate; semiconductor elements 25, 26 that are joined on the circuit pattern; and a sealing resin 28 for sealing the insulated substrate, the circuit pattern, and the semiconductor elements. The surface 23a of the insulated substrate in a part where the insulative substrate and the sealing resin are bonded to each other, is characterized in that, in a cross section of the insulated substrate, the average roughness derived in a 300-m wide range is 0.15 m or greater and the average roughness derived in a 3-m-wide range is 0.02 m or greater.

A substrate is disclosed. In an embodiment, a substrate includes a ceramic main body, an organic surface structure on at least one first outer face of the ceramic main body and outer redistribution layers integrated into the organic surface structure.

A method for forming a semiconductor package is disclosed herein. The method includes forming a package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate includes a recess region below the first major surface defined with a die region and a non-die region surrounding the die region. A semiconductor die is disposed in the die region within the recess region. A dam structure is disposed within the recess region. The dam structure surrounds the semiconductor die and extends upwardly to a height below the first major surface of the package substrate. The method also includes dispensing a liquid encapsulant material into the recess region. The liquid encapsulant material is surrounded by the dam structure and extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.

A method for producing a metal-ceramic substrate with at least one electrically conductive via, in which one metal layer, respectively, is attached in a planar manner to a ceramic plate or a ceramic layer to each of two opposing surface sides of the ceramic layer is provided. The method includes introducing a metal-containing, powdery and/or liquid substance into a hole in the ceramic layer delimiting the via prior to the attachment of both metal layers, or subsequent to the attachment of one of the two metal layers to form an assembly. Prior to the attachment of the other one of the two metal layers, and the assembly is subjected to a high-temperature step above 500 C. in which the metal-containing substance wets the ceramic layer at least partially with a wetting angle of less than 90.