H01L21/4807

CHEMISTRY COMPATIBLE COATING MATERIAL FOR ADVANCED DEVICE ON-WAFER PARTICLE PERFORMANCE
20180269039 · 2018-09-20 ·

A chamber component comprises a body and a plasma sprayed ceramic coating on the body. The plasma sprayed ceramic coating is applied using a method that includes feeding powder comprising a yttrium oxide containing solid solution into a plasma spraying system, wherein the powder comprises a majority of donut-shaped particles, each of the donut-shaped particles having a spherical body with indentations on opposite sides of the spherical body. The method further includes plasma spray coating the body to apply a ceramic coating onto the body, wherein the ceramic coating comprises the yttrium oxide containing solid solution, wherein the donut-shaped particles cause the ceramic coating to have an improved morphology and a decreased porosity as compared to powder particles of other shapes, wherein the improved surface morphology comprises a reduced amount of surface nodules.

Methods of etching glass substrates and glass substrates

A method of forming a glass substrate includes providing a glass substrate having alumina, translating a pulsed laser beam on the glass substrate to form one or more pilot holes, contacting the glass substrate with an etching solution, and providing agitation. The etching solution has a pH from about 0 to about 2.0, and an etch rate is less than about 3 m/min. A glass substrate is disclosed having a first surface and a second surface opposite the first surface in a thickness direction, and at least one hole penetrating the first surface, wherein the at least one hole has been etched by an etching solution. A greatest distance d1 between (1) a first plane that contacts the first surface in regions that do not have the at least one hole or a deviation in a thickness of the substrate surrounding the at least one hole and (2) a surface of the deviation recessed from the first plane is less than or equal to about 0.2 m.

Molded package with chip carrier comprising brazed electrically conductive layers

A package which comprises a chip carrier, at least one electronic chip mounted on the chip carrier, an electrically conductive contact structure electrically coupled with the at least one electronic chip, and a mold-type encapsulant encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip, wherein the chip carrier comprises a thermally conductive and electrically insulating core covered on both opposing main surfaces thereof by a respective brazed electrically conductive layer.

Methods of Continuous Fabrication of Features in Flexible Substrate Webs and Products Relating to the Same

Methods of continuous fabrication of features in flexible substrates are disclosed. In one embodiment, a method of fabricating features in a substrate web includes providing the substrate web arranged in a first spool on a first spool assembly, advancing the substrate web from the first spool and through a laser processing assembly comprising a laser, and creating a plurality of defects within the substrate web using the laser. The method further includes advancing the substrate web through an etching assembly and etching the substrate web at the etching assembly to remove glass material at the plurality of defects, thereby forming a plurality of features in the substrate web. The method further includes rolling the substrate web into a final spool.

Copper/ceramic joined body and insulating circuit substrate

A copper/ceramic bonded body is provided, including: a copper member made of copper or a copper alloy; and a ceramic member, the copper member and the ceramic member being bonded to each other, in which a total concentration of Al, Si, Zn, and Mn is 3 atom % or less when concentration measurement is performed by an energy dispersive X-ray analysis method at a position 1000 nm away from a bonded interface between the copper member and the ceramic member to a copper member side, assuming that a total value of Cu, Mg, Ti, Zr, Nb, Hf, Al, Si, Zn, and Mn is 100 atom %.

HEATSINK-INTEGRATED CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING SAME
20240347416 · 2024-10-17 · ·

The present invention relates to a heatsink-integrated ceramic substrate and a method for manufacturing same, the heatsink-integrated ceramic substrate comprising: a ceramic substrate including metal layers on the upper and lower surfaces of a ceramic base; and a heatsink bonded to one surface of a metal layer, wherein the heatsink may include a flat portion having one surface in contact with the metal layer, and a plurality of heat dissipation fins formed to protrude from the other surface of the flat portion to be spaced apart from each other and contacting a liquid-type refrigerant.

Chemistry compatible coating material for advanced device on-wafer particle performance

A method includes feeding powder comprising a yttrium oxide into a plasma spraying system, wherein the powder comprises a majority of donut-shaped particles, each of the donut-shaped particles having a spherical body with indentations on opposite sides of the spherical body. The method further includes plasma spray coating an article to apply a ceramic coating onto the article, wherein the ceramic coating comprises the yttrium oxide, wherein the donut-shaped particles cause the ceramic coating to have an improved morphology and a decreased porosity as compared to powder particles of other shapes, wherein the improved surface morphology comprises a reduced amount of surface nodules.

GLASS SUBSTRATE ASSEMBLIES HAVING LOW DIELECTRIC PROPERTIES

Glass substrate assemblies having low dielectric properties, electronic assemblies incorporating glass substrate assemblies, and methods of fabricating glass substrate assemblies are disclosed. In one embodiment, a substrate assembly includes a glass layer 110 having a first surface and a second surface, and a thickness of less than about 300 m. The substrate assembly further includes a dielectric layer 120 disposed on at least one of the first surface or the second surface of the glass layer. The dielectric layer has a dielectric constant value of less than about 3.0 in response to electromagnetic radiation having a frequency of 10 GHz. In some embodiments, the glass layer is made of annealed glass such that the glass layer has a dielectric constant value of less than about 5.0 and a dissipation factor value of less than about 0.003 in response to electromagnetic radiation having a frequency of 10 GHz. An electrically conductive layer 142 is disposed on a surface of the dielectric layer, within the dielectric layer or under the dielectric layer.

WIRING BOARD, ELECTRONIC DEVICE, AND ELECTRONIC MODULE
20180151483 · 2018-05-31 · ·

A wiring board includes an insulating substrate that is rectangular in a plan view, a plurality of mount electrodes arranged to face each other on a first main surface of the insulating substrate along a pair of opposing sides of the insulating substrate in a plan view, a plurality of terminal electrodes arranged to face each other on a second main surface of the insulating substrate along the pair of opposing sides of the insulating substrate in a perspective plan view, and an inner metal layer arranged inside the insulating substrate and extending in a direction perpendicular to the pair of opposing sides of the insulating substrate in a perspective plan view.

Method for manufacturing a chip arrangement including a ceramic layer

A chip arrangement is provided, the chip arrangement, including a carrier; a first chip electrically connected to the carrier; a ceramic layer disposed over the carrier; and a second chip disposed over the ceramic layer; wherein the ceramic layer has a porosity in the range from about 3% to about 70%.