Certain aspects of the present disclosure generally relate to an embedded trace substrate with partially buried traces, methods for fabrication thereof, and apparatus comprising such an embedded trace substrate. One example method of fabricating an embedded trace substrate generally includes creating a pattern of conductive traces above a dielectric layer and mechanically pressing on the pattern of conductive traces such that lower portions of the conductive traces are buried in the dielectric layer.

A through electrode substrate includes a substrate provided with a through hole, a through electrode positioned in the through hole, and a first wiring structure including at least a first wiring layer positioned on a first surface of the substrate, and a second wiring layer positioned on the first wiring layer. The first wiring layer and the second wiring layer respectively have an insulation layer and an electroconductive layer. A first insulation layer of the first wiring layer includes at least an organic layer. At least one wiring layer of the first wiring structure includes an inorganic layer having insulation properties, the inorganic layer being positioned to a first side of the organic layer of the first insulation layer of the first wiring layer.

A mold includes a mold base material and a rugged structure located at a main surface of the mold base material. The rugged structure includes a plurality of linearly shaped projected portions for forming wiring, and a circularly shaped projected portion for forming a pad portion, in which a light-shielding layer is provided at a top portion flat surface of the circularly shaped projected portion for forming the pad portion.

An inductor may be fabricated comprising a magnetic material layer and an electrically conductive via or trace extending through the magnetic material layer, wherein the magnetic material layer comprises dielectric magnetic filler particles within a carrier material. Further embodiments may include incorporating the inductor of the present description into an electronic substrate and may further include an integrated circuit device attached to the electronic substrate and the electronic substrate may further be attached to a board, such as a motherboard.

A package structure including a redistribution circuit structure, a wiring substrate, an insulating encapsulation, a buffer layer, a semiconductor device and a stiffener ring is provided. The redistribution circuit structure includes a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The insulating encapsulation is disposed on the first surface of the redistribution circuit structure and laterally encapsulating the wiring substrate. The buffer layer is disposed over the second surface of the redistribution circuit structure. The semiconductor device is disposed on the buffer layer, and the semiconductor device is electrically connected to the wiring substrate through the redistribution circuit structure. The stiffener ring is adhered with the buffer layer by an adhesive.

A wiring circuit board includes a first insulating layer, a terminal, a second insulating layer disposed at one side in a thickness direction of the terminal, and a wire continuous to the terminal in a direction crossing the thickness direction. The first insulating layer has an opening portion passing through the first insulating layer in the thickness direction and having the opening cross-sectional area increasing as being closer to one side in the thickness direction. The terminal has a peripheral end portion and a solid portion. The peripheral end portion contacts with an inner side surface of the first insulating layer. The inner side surface forms the opening portion. The solid portion integrally disposed with the peripheral end portion at the inner side of the peripheral end portion. The peripheral end portion and the solid portion fill the entire opening portion.

An inductor may be fabricated comprising a magnetic material layer and an electrically conductive via or trace extending through the magnetic material layer, wherein the magnetic material layer comprises dielectric magnetic filler particles within a carrier material. Further embodiments may include incorporating the inductor of the present description into an electronic substrate and may further include an integrated circuit device attached to the electronic substrate and the electronic substrate may further be attached to a board, such as a motherboard.

Device package and a method of forming a device package are described. The device package includes an interposer with interconnects on an interconnect package layer and a conductive layer on the interposer. The device package has dies on the conductive layer, where the package layer includes a zero-misalignment two-via stack (ZM2VS) and a dielectric. The ZM2VS directly coupled to the interconnect. The ZM2VS further includes the dielectric on a conductive pad, a first via on a first seed, and first seed on a top surface of the conductive pad, where the first via extends through dielectric. The ZM2VS also has a conductive trace on dielectric, and a second via on a second seed, the second seed is on the dielectric, where the conductive trace connects to first and second vias, where second via connects to an edge of conductive trace opposite from first via.

An electronic circuit including a substrate having a first dielectric characteristic. The substrate can include a first side and a second side. An intermediary material can be disposed within the substrate. For instance, the intermediary material can be located between the first side and the second side. The intermediary material can include a second dielectric characteristic, where the second dielectric characteristic is different than the first dielectric characteristic. A first conductive layer can be disposed on the first side, and a second conductive layer can be disposed on the second side. A conductive path can be electrically coupled between the first conductive layer and the second conductive layer. The conductive path can be in contact with at least a portion of the intermediary material.

A method of manufacturing a glass article comprises: (A) forming a first layer of catalyst metal on a glass substrate; (B) heating the glass substrate; (C) forming a second layer of an alloy of a first metal and a second metal on the first layer; (D) heating the glass substrate, thereby forming a glass article comprising: (i) the glass substrate; (ii) an oxide of the first metal covalently bonded thereto; and (iii) a metallic region bonded to the oxide, the metallic region comprising the catalyst, first, and second metals. In embodiments, the method further comprises (E) forming a third layer of a primary metal on the metallic region; and (F) heating the glass article thereby forming the glass article comprising: (i) the oxide of the first metal covalently bonded the glass substrate; and (ii) a new metallic region bonded to the oxide comprising the catalyst, first, second, and primary metals.