A heat sink includes a channel including a gyroid structure portion having a non-uniform thickness.

An integrated device package is disclosed. The integrated device package can include an electronic component package which includes an electronic component. The integrated device package can include a protective material in which the electronic component is at least partially embedded, wherein the electronic component package comprises a first surface and a second surface. The integrated device package can include a heat sink plated on the first surface. The heat sink can include a base portion and a plurality of heat-dissipating projections extending outwardly therefrom.

Various embodiments of the present disclosure are directed towards a semiconductor structure including a device layer having a front-side surface opposite a back-side surface. A first heat dispersion layer is disposed along the back-side surface of the device layer. A second heat dispersion layer underlies the front-side surface of the device layer. The second heat dispersion layer has a thermal conductivity lower than a thermal conductivity of the first heat dispersion layer.

The present disclosure relates to a radio frequency (RF) device and a process for making the same. According to the process, a precursor wafer, which includes device regions, individual interfacial layers, individual p-type doped layers, and a silicon handle substrate, is firstly provided. Each individual interfacial layer is over an active layer of a corresponding device region, each individual p-type doped layer is over a corresponding individual interfacial layer, and the silicon handle substrate is over each individual p-type doped layer. Herein, each individual interfacial layer is formed of SiGe, and each individual p-type doped layer is a silicon layer doped with a p-type material that has a doped concentration greater than 1E18cm-3. Next, the silicon handle substrate is completely removed to provide an etched wafer, and each individual p-type doped layer is completely removed from the etched wafer.

An integrated circuit assembly may be formed having a substrate core, wherein the substrate core includes at least one heat transfer fluid channel formed therein, a first build-up layer formed on a first surface of the substrate core, and a second build-up layer formed on a second surface of the substrate core, and methods of fabricating the same. In embodiments of the present description, the integrated circuit structure may include at least one integrated circuit device formed within at least one of the first build-up layer and the second build-up layer. The embodiments of the present description allow for cooling within the substrate, which may significantly reduce thermal damage to the components of the substrate and/or integrated circuit devices within the substrate.

A semiconductor package may include a package substrate, semiconductor chips, signal bumps, and first and second heat dissipation bumps. The semiconductor chips may be stacked on an upper surface of the package substrate, have first and second regions having different heat dissipation efficiencies. The second temperature may be higher than the first temperature. The signal bumps may be arranged between the semiconductor chips. The first heat dissipation bumps may be arranged between the semiconductor chips in the first region by a first pitch. The second heat dissipation bumps may be arranged between the semiconductor chips in the second region by a second pitch narrower than the first pitch. Heat generated from the second region of the semiconductor chips may be dissipated through the second heat dissipation bumps, which may be relatively closely arranged with each other.

An integrated circuit structure may be formed having a substrate, at least one integrated circuit device embedded in and electrically attached to the substrate, and a heat dissipation device in thermal contact with the integrated circuit device, wherein a first portion of the heat dissipation device extends into the substrate and wherein a second portion of the heat dissipation device extends over the substrate. In one embodiment, the heat dissipation device may comprise the first portion of the heat dissipation device formed from metallization within the substrate.

There is provided a manufacturing method for an insulating resin circuit substrate, which is a manufacturing method for an insulating resin circuit substrate which includes an insulating resin layer composed of a polyimide resin and a circuit layer consisting of metal pieces disposed in a circuit pattern shape on one surface of the insulating resin layer. The manufacturing method includes a temporary fixing step of pressurizing the metal pieces toward the resin sheet material while heating the metal pieces to temporarily fix the metal pieces and a joining step of disposing a cushion material on a side of the metal pieces which are temporarily fixed and pressurizing the metal pieces and the resin sheet material in a laminating direction, while heating the metal pieces and the resin sheet material, to join the resin sheet material and the metal pieces.

An object of the present invention is to provide a semiconductor package with which it is possible to reduce a volume of an encapsulation resin and to easily embed a resin regardless of thicknesses of semiconductor chips and a small distance between adjacent semiconductor chips, as well as to provide a thin semiconductor package with which a final product includes no support flat plate. To realize this, a semiconductor package having a structure wherein semiconductor chips are accommodated in cavity parts of a support which is formed by copper plating and includes the cavity parts is provided.

Embodiments of the present invention are directed to heat transfer arrays, cold plates including heat transfer arrays along with inlets and outlets, and thermal management systems including cold-plates, pumps and heat exchangers. These devices and systems may be used to provide cooling of semiconductor devices or other devices and particularly such devices that produce high heat concentrations. The heat transfer arrays may include microjets, multi-stage microjets, microchannels, fins, wells, wells with flow passages, well with stress relief or stress propagation inhibitors, and integrated microjets and fins.