A method of manufacturing a semiconductor device, including preparing a heat-dissipating base, performing a first initial warping or a second initial warping of the heat-dissipating base, soldering a laminated substrate, including a circuit board provided on an insulating board, on the heat-dissipating base after the first or second initial warping, and soldering a semiconductor chip on the circuit board. The first initial warping includes performing shot peening on the rear surface of the heat-dissipating base to form a hardened layer, and subsequently plating the front and rear surfaces of the heat-dissipating base, including the hardened layer formed thereon, with a metal material. The second initial warping includes plating the front and rear surfaces of the heat-dissipating base with the metal material to form a plating layer, and subsequently performing the shot peening on the rear surface of the heat-dissipating base, including the plating layer formed thereon, with the metal material.

A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the first, a second and the side surfaces positioned between the first and the second surfaces, the base substrate containing a metal, attaching a metal different from the metal contained in the base substrate to the first and the side surfaces, disposing a semiconductor device on the second surface, the semiconductor device having an external terminal, forming a resin insulating layer sealing the semiconductor device, forming a first conductive layer on the resin insulating layer, forming an opening, exposing the external terminal, in the first conductive layer and the resin insulating layer; and forming a metal layer on the first and the side surfaces, on the first conductive layer and in the opening.

Disclosed are apparatuses and techniques for fabricating an apparatus including a semiconductor device. The semiconductor device may include: a die, a thermally conductive interface that includes a thermal bridge interposer (THBI) structure, and a substrate. The die is coupled to the substrate by the thermally conductive interface and at least a portion of the die is coupled to the substrate by the THBI structure.

A semiconductor die is provided. The semiconductor die includes a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure and a trench extending from a backside of the semiconductor substrate into the semiconductor substrate. A length of the trench is equal or larger than a lateral dimension of the semiconductor substrate.

A semiconductor device including a semiconductor chip and a heat dissipation unit (heat sink) is configured as follows. The heat dissipation unit (heat sink) includes a resin tape, and a fin constituted of a graphite sheet and protruding from the resin tape. The fin, including graphene, is disposed on the semiconductor chip such that the graphene is disposed in a direction crossing a surface of the semiconductor chip. The heat dissipation unit is a rolled body in which the graphite sheet and the resin tape are layered and rolled. Thus, by use of the graphene as a constituent material of the fin, thermal conductivity is improved, whereby a heat dissipation characteristic is improved. Furthermore, since the fin is protruded from the resin tape, an exposed area of the fin is increased, and accordingly, the heat dissipation characteristic can be improved.

A manifold structure and method of forming a manifold structure includes using an ultrasonic additive manufacturing (UAM) process to build up a solid structure, machining the solid structure to form a cavity and free-standing support pillars within the cavity, and using a UAM process to build up a finstock layer over the cavity. The support pillars formed by machining have yield strengths high enough to support UAM of the finstock layer over the cavity. A plurality of finstock layers are built up within the cavity to segment the cavity into a plurality of cavities. UAM of the finstock layers enables the finstock layers to be stacked in a direction normal to a direction of flow through the cavity for efficiently transferring heat through the manifold structure.

A method of making an integrated circuit includes operations related to forming an oxide layer over a top surface of a substrate; depositing a layer of semiconductor material over the oxide layer; and manufacturing a thermal substrate contact extending through the layer of semiconductor material and the oxide layer to the top surface of the substrate. The thermal substrate contact is against, but does not extend through, the substrate. Manufacturing a thermal substrate contact further includes operations of etching a first opening through the layer of semiconductor material to expose the oxide layer; etching a second opening through the first opening to expose the substrate; and filling the first opening and the second opening with a conductive material.

An electrostatic chuck assembly includes a dielectric plate having an absorption electrode to generate an electrostatic force, the dielectric plate securing a substrate by the electrostatic force, a conductive base plate under the dielectric plate to be applied with a high frequency electric power, the conductive base plate being an electrode to generate plasma, and an insulating plate under the base plate, the insulating plate having an insulation body and an insulation sink, and the insulation sink having a dielectric constant lower than that of the insulation body.

A semiconductor package includes a package substrate, a semiconductor chip disposed on the package substrate, and a stiffener disposed on the package substrate. The stiffener includes an inner portion configured to surround the semiconductor chip, the inner portion defining a space on the package substrate external to the inner portion and located between the inner portion and outer edges of the package substrate, and a plurality of leg portions extending outwardly from the inner portion toward one or more of the outer edges of the package substrate and corners of the package substrate.

A semiconductor device includes a substrate, an electronic component, a cover, a heat conduction component and a dam. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The heat conduction component is disposed between the electronic component and the cover. The dam is disposed between the electronic component and the cover and surrounds the heat conduction component.