Patent classifications
H01L2021/60277
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
A method of manufacturing a semiconductor device may include forming an adhesive film on a surface of a semiconductor chip, mounting the semiconductor chip on a substrate such that the adhesive film contacts an upper surface of the substrate, and bonding the semiconductor chip and the substrate curing the adhesive film by simultaneously performing a thermo-compression process and an ultraviolet irradiation process on the adhesive film disposed between the substrate and the semiconductor chip.
Solar cell edge interconnects
Edge interconnects for interconnecting solar cells are disclosed. The edge interconnects include a layer of an electrically conductive adhesive overlying an insulating dielectric layer applied to edge of a solar cell and electrically interconnected to a busbar. Solar cell modules include adjacent solar cells comprising edge interconnects interconnected using an interconnection element. An interconnection element can be a solder paste or a solder containing electrically conductive ribbon. Methods of forming solar cell edge interconnects include applying an insulating dielectric coating to edges of a solar cell, depositing a busbar in proximity to the insulated edges of the solar cell, depositing an electrically conductive adhesive over at least portion of the busbar an over at least a portion of the dielectric layer. Solar cell modules can be formed by interconnecting adjacent solar cells using an interconnection element.
Profiled thermode
The invention relates to a thermode for connecting at least two components, comprising a tip having a body portion with at least two contact surface portions connected to and spaced apart from one another by a recess configured to receive a portion of one of the at least two components; and a support portion having at least one supporting surface portion configured to support a further component (being the other of the at least two components, wherein the contact surface portions and the supporting surface portion are configured to receive the at least two components between them and wherein one or both of the contact surface portions and the supporting surface portion are moveable relative to and towards one another to exert heat and/or pressure on the at least two components located between the contact surface portions and the supporting portion.
Printed adhesion deposition to mitigate integrated circuit delamination
A method includes applying a die attach material to a die pad of an integrated circuit. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit to mitigate delamination between the integrated circuit die and the die pad.
III-nitride-based semiconductor packaged structure and method for manufacturing the same
A III-nitride-based semiconductor packaged structure includes a lead frame, an adhesive layer, a III-nitride-based die, an encapsulant, and at least one bonding wire. The lead frame includes a die paddle and a lead. The die paddle has first and second recesses arranged in a top surface of the die paddle. The first recesses are located adjacent to a relatively central region of the top surface. The second recesses are located adjacent to a relatively peripheral region of the top surface. The first recess has a shape different from the second recess from a top-view perspective. The adhesive layer is disposed on the die paddle to fill into the first recesses. The III-nitride-based die is disposed on the adhesive layer. The encapsulant encapsulates the lead frame and the III-nitride-based die. The second recesses are filled with the encapsulant. The bonding wire is encapsulated by the encapsulant.
Lead frame with conductive clip for mounting a semiconductor die with reduced clip shifting
A semiconductor assembly includes a semiconductor die comprising lower and upper electrical contacts. A lead frame having a lower die pad is electrically and mechanically connected to the lower electrical contact of the die. An upper conductive member has a first portion electrically and mechanically connected to the upper electrical contact of the die. A lead terminal has a surface portion electrically and mechanically connected to a second portion of the conductive member. The surface portion of the lead terminal and/or the second portion of the conductive member has a series of grooves disposed therein. Packaging material encapsulates the semiconductor die, at least a portion of the lead frame, at least a portion of the upper conducive member and at least a portion of the lead terminal.
Method for producing a power semiconductor module
In order to produce a power semiconductor module, a circuit carrier is populated with a semiconductor chip and with an electrically conductive contact element. After populating, the semiconductor chip and the contact element are embedded into a dielectric embedding compound, and the contact element is exposed. In addition, an electrically conductive base layer is produced which electrically contacts the exposed contact element and which bears on the embedding compound and the exposed contact element. A prefabricated metal film is applied to the base layer by means of an electrically conductive connection layer.
Display device
A display device can include a substrate including a display area, on which an input image is displayed, and a pad part including a convex portion and a concave portion that are alternately positioned outside the display area and have a height difference between them, and a circuit element attached to the pad part and including a bump inserted into the concave portion of the pad part. The pad part can further include a lower pad electrode electrically connected to a signal line extended from the display area, a first insulating layer disposed on the lower pad electrode in the convex portion, and an upper pad electrode disposed on the first insulating layer, connected to the lower pad electrode through a first contact hole penetrating the first insulating layer and extending into at least a portion of the concave portion.
High heat dissipation stacked chip package structure and the manufacture method thereof
The present invention provides a semiconductor device including a first glass substrate, a first integrated chip, a first anisotropic conductive film, a second glass substrate, a second integrated chip, a second anisotropic conductive film, and a packaging body.
DISPLAY DEVICE
A display device can include a substrate including a display area, on which an input image is displayed, and a pad part including a convex portion and a concave portion that are alternately positioned outside the display area and have a height difference between them, and a circuit element attached to the pad part and including a bump inserted into the concave portion of the pad part. The pad part can further include a lower pad electrode electrically connected to a signal line extended from the display area, a first insulating layer disposed on the lower pad electrode in the convex portion, and an upper pad electrode disposed on the first insulating layer, connected to the lower pad electrode through a first contact hole penetrating the first insulating layer and extending into at least a portion of the concave portion.