A particle removed from a substrate is suppressed from adhering to the substrate again. A substrate cleaning apparatus includes a substrate holder configured to hold the substrate; a gas nozzle configured to jet a cleaning gas to the substrate on the substrate holder; and a nozzle cover provided to surround the gas nozzle. The cleaning gas is jetted to a decompression chamber of the nozzle cover from the gas nozzle, and a gas cluster configured to remove the particle on the substrate in the decompression chamber is generated. A gas for a gas curtain is jetted from a holder support of the substrate holder toward the nozzle cover, and the gas curtain is formed between the nozzle cover and the holder support.

A ceramic component included in a plasma etching apparatus, wherein a surface of the ceramic component may include a base material and a composite material disposed in contact with the base material, wherein a resistivity of the ceramic component may be 10.sup.−1 Ω.Math.cm to 20 Ω.Math.cm, and wherein the base material may include a first boron carbide-based material and the composite material may include at least one selected from the group consisting of a second boron carbide-based material, a carbon-based material, and combinations thereof, is disclosed.

Embodiments disclosed herein may include a heater pedestal. In an embodiment, the heater pedestal may comprise a heater pedestal body and a conductive mesh embedded in the heater pedestal. In an embodiment, the conductive mesh is electrically coupled to a voltage source In an embodiment, the heater pedestal may further comprise a support surface on the heater pedestal body. In an embodiment, the support surface comprises a plurality of pillars extending out from the heater pedestal body and arranged in concentric rings. In an embodiment pillars in an outermost concentric ring have a height that is greater than a height of pillars in an innermost concentric ring.

A pedestal assembly including a pedestal for supporting a substrate. A central shaft positions the pedestal at a height during operation. A ring is placed along a periphery of the pedestal. A ring adjuster subassembly includes an adjuster flange disposed around a middle section of the central shaft. The subassembly includes a sleeve connected to the adjuster flange and extending from the adjuster flange to an adjuster plate disposed under the pedestal. The subassembly includes ring adjuster pins connected to the adjuster plate and extending vertically from the adjuster plate. Each of the ring adjuster pins being positioned on the adjuster plate at locations adjacent to and outside of a pedestal diameter. The ring adjuster pins contacting an edge undersurface of the ring. The adjuster flange coupled to at least three adjuster actuators for defining an elevation and tilt of the ring relative to a top surface of the pedestal.

A carrier containing a plurality of semiconductor wafers in a lot is transported into a heat treatment apparatus. Thereafter, a recipe specifying treatment procedures and treatment conditions is set for each of the semiconductor wafers. Next, a reflectance of each of the semiconductor wafers stored in the carrier is measured. Based on the set recipe and the measured reflectance of each semiconductor wafer, a predicted attainable temperature of each semiconductor wafer at the time of flash heating treatment is calculated, and the calculated predicted attainable temperature is displayed. This allows the setting of the treatment conditions with reference to the displayed predicted attainable temperature, to thereby easily achieve the setting of the heat treatment conditions.

A substrate processing apparatus includes a stage including a first section and a second section, pins, a lifter configured to raise and lower the pins, and a controller configured to control the lifter. On the first section, a substrate is placed. On the second section, an edge ring is placed. The second section is provided at a periphery of the first section. Also, at the second section, holes are provided. The pins are provided in the respective holes so as to move up and down through the holes.

An etching apparatus includes a reaction chamber having an internal space; an upper electrode in the reaction chamber; a fixing chuck in the internal space of the reaction chamber and below the upper electrode; an electrostatic chuck above the fixing chuck and on which a wafer is configured to be placed; a focus ring surrounding the electrostatic chuck; and a plurality of sealing members configured to seal cooling gas provided to the focus ring and being in contact with the focus ring. The plurality of sealing members may be formed of a porous material. Each of the plurality of sealing members may include a body portion and an outer surface surrounding the body portion. Only the body portion may include voids and the outer surface may be smooth and free of voids.

An example semiconductor processing system may include a chamber body having sidewalls and a base. The processing system may also include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate, and a shaft coupled with the support platen. The processing system may further include a plate coupled with the shaft of the substrate support. The plate may have an emissivity greater than 0.5. In some embodiments, the plate may include a radiation shied disposed proximate the support platen. In some embodiments, the plate may include a pumping plate disposed proximate the base of the chamber body. In some embodiments, the emissivity of the plate may range between about 0.5 and about 0.95.

Methods for etching a semiconductor structure and for conditioning a processing reactor in which a single semiconductor structure is treated are disclosed. An engineered polycrystalline silicon surface layer is deposited on a susceptor which supports the semiconductor structure. The polycrystalline silicon surface layer may be engineered by controlling the temperature at which the layer is deposited, by grooving the polycrystalline silicon surface layer or by controlling the thickness of the polycrystalline silicon surface layer.

The present disclosure relates to a support ring for a thermal processing chamber. The support ring has a polysilicon coating. The polysilicon coating is formed using a plasma spray deposition process.