H01L21/68742

Lift Pin Assembly for a Plasma Processing Apparatus
20230010075 · 2023-01-12 ·

A lift pin assembly for a lift pin of a plasma processing apparatus is provided. The lift pin assembly includes a pin housing defining an opening into which a lift pin extends. The pin housing is positioned such that the opening is aligned with an opening defined by an electrostatic chuck. The assembly includes a pin height adjustment member partially positioned within the opening defined by the pin housing. The pin height adjustment member is movable along an axis in a first direction and a second direction to move the lift pin into and out of the opening defined by the electrostatic chuck. The assembly includes a pin holder assembly at least partially positioned within an opening defined by the pin height adjustment member. The pin holder assembly is configured to hold the lift pin such that the lift pin is aligned with the opening defined by the electrostatic chuck.

Apparatus for treating substrate

An apparatus for treating a substrate includes a chamber having a treating space formed therein, a substrate support unit that supports the substrate in the treating space, a plate that is located to face the substrate support unit in the treating space and that has a plurality of holes formed therein, a gas supply unit that supplies gas into the treating space through the holes, and a gas exhaust unit that exhausts the gas in the treating space through the holes.

Substrate support assemblies and components

Exemplary substrate support assemblies may include a platen characterized by a first surface configured to support a semiconductor substrate. The assemblies may include a first stem section coupled with a second surface of the platen opposite the first surface of the platen. The assemblies may include a second stem section coupled with the first stem section. The second stem section may include a housing and a rod holder disposed within the housing. The second stem section may include a connector seated within the rod holder at a first end of the connector. The second stem section may include a heater rod disposed within the first end of the connector and a heater extension rod coupled with the connector at a second end of the connector. The second stem section may include an RF rod and an RF strap coupling the RF rod with an RF extension rod.

Semiconductor processing chambers for deposition and etch

Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

DEVICE FOR ADJUSTING WAFER, REACTION CHAMBER, AND METHOD FOR ADJUSTING WAFER
20230009207 · 2023-01-12 ·

Embodiments of the present disclosure provide a device for adjusting a wafer, a reaction chamber, and a method for adjusting a wafer. The device for adjusting a wafer includes: a lifting module, the lifting module including a first carrier surface configured to carry a wafer, and the first carrier surface ascending to a preset highest position or descending to a preset lowest position relative to a reference surface; a carrier module, the carrier module including a second carrier surface, a position of the second carrier surface being higher than the preset lowest position and being lower than the preset highest position, and the second carrier surface being configured to receive and carry the wafer carried on the first carrier surface; and a suction module, the suction module including a first suction opening facing the wafer and surrounded by the second carrier surface.

SYSTEM AND METHOD FOR WAFER BREAKAGE PREVENTION
20230011361 · 2023-01-12 ·

The present application discloses a pressure drive system and method, and a semiconductor manufacture apparatus employing the system to perform pressure drive; by importing information of this wafer before a manufacture process initiates, a corresponding safe driving pressure and a corresponding safety threshold for each wafer are acquired and set for pressure control, and an abnormality judgment is performed based on data fed back by a pressure detection module in real time, thereby effectively avoiding a wafer breakage caused when an electrostatic release is abnormal, and the pressures for various wafers under different situations are controllable, and thus, an accuracy of the control is improved; with real-time feedback from the pressure detection module and a pressure regulation module, a wafer breakage, caused when an electrostatic release is abnormal, is effectively avoided.

SUBSTRATE ALIGNMENT DEVICE, SUBSTRATE PROCESSING APPARATUS, SUBSTRATE ALIGNMENT METHOD AND SUBSTRATE PROCESSING METHOD

A substrate alignment device includes first and second support members that are arranged to be opposite to each other and be spaced apart from each other in a plan view, and respectively support an outer peripheral end of a substrate from a position below the substrate. Further, the substrate alignment device includes a first pressing member that is arranged to be opposite to the first support member in a plan view, and moves the substrate by pressing one portion of the outer peripheral end of the substrate in a first direction directed from the second support member toward the first support member with the substrate supported by the first and second support members. The first support member includes a movement limiter that limits movement of the substrate in the first direction past a predetermined prescribed position.

SUBSTRATE PROCESSING SYSTEM

Embodiments disclosed herein generally relate to a system and, more specifically, a substrate processing system. The substrate processing system includes one or more cooling systems. The cooling systems are configured to lower and/or control the temperature of a body of the substrate processing system. The cooling systems include features to cool the body disposed in the substrate processing system using gas and/or liquid cooling systems. The cooling systems disclosed herein can be used when the body is disposed at any height.

SUBSTRATE PROCESSING SYSTEM AND TRANSFER METHOD

A substrate processing system includes a vacuum transfer module; a plasma process module; a transfer robot in the vacuum transfer module; a stage in the plasma process module; a first ring disposed on the stage and a second ring disposed on the first ring to surround a substrate that is placed on the stage, the second ring having an inner diameter smaller than an inner diameter of the first ring; actuators to move support pins vertically to raise the first and the second rings and a transfer jig; and a controller configured to selectively execute a simultaneous transfer mode in which the transfer robot is caused to simultaneously transfer the first ring and the second ring and a sole transfer mode in which the transfer robot is caused to transfer only the second ring.

Manufacturing process of element chip using laser grooving and plasma-etching

A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.