Cooling devices for SOI wafers and methods for forming the devices are presented. A substrate having a top surface layer, a support substrate and an insulator layer isolating the top surface layer from the support substrate is provided. At least one device is disposed in the top surface layer of the substrate. The IC includes a cooling device. The cooling device includes a doped layer which is disposed in a top surface of the support substrate, and a RDL layer disposed within the support substrate below the doped layer for providing connections to hotspots in the doped layer to facilitate thermoelectric conduction of heat in the hotspots away from the hotspots.

Fabricating of radio-frequency (RF) devices involve providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying a sacrificial material to the backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, the interface material at least partially covering the sacrificial material, and removing at least a portion of the sacrificial material to form a cavity at least partially covered by the interface layer.

A semiconductor device includes: a substrate having a first semiconductor layer, an insulating layer, and a second semiconductor layer; an active device on the substrate; an interlayer dielectric (ILD) layer on the active device; a first contact plug in the ILD layer and electrically connected to the active device; and a second contact plug in the ILD layer and the insulating layer, wherein a top surface of the second contact plug is higher than a top surface of the ILD layer.

The invention disclosed a method of manufacturing the thin film, which belongs to the technological field of SOI wafer manufacture. By growing a layer of dielectric material (silicon oxide) on the provided high-resistivity silicon wafer, then to grow a layer of amorphous silicon on the dielectric material, to transfer a layer of silicon oxide to the amorphous silicon, to make the mono crystalline silicon exist on the oxidation layer, so that a SOI wafer with a layer of amorphous silicon is manufactured. The process above is completed in specific process conditions. The manufactured thin film, e.g. SOI wafer with amorphous silicon layer, is used main for RF apparatus.

Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a substrate wafer that includes a glass substrate (or a silicon substrate covered by a protection layer) is glass bonded to the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.

Various embodiments of the present application are directed to a method for forming a thin semiconductor-on-insulator (SOI) substrate without implantation radiation and/or plasma damage. In some embodiments, a device layer is epitaxially formed on a sacrificial substrate and an insulator layer is formed on the device layer. The insulator layer may, for example, be formed with a net charge that is negative or neutral. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates. The sacrificial substrate is removed, and the device layer is cyclically thinned until the device layer has a target thickness. Each thinning cycle comprises oxidizing a portion of the device layer and removing oxide resulting from the oxidizing.

Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

A semiconductor-on-insulator (SOI) transistor includes a semiconductor layer situated over a buried oxide layer, the buried oxide layer being situated over a substrate. The SOI transistor is situated in the semiconductor layer and includes a transistor body, gate fingers, source regions, and drain regions. The transistor body has a first conductivity type. The source regions and the drain regions have a second conductivity type opposite to the first conductivity type. A heavily-doped body-implant region has the first conductivity type and overlaps at least one source region. A common silicided region electrically ties the heavily-doped body-implant region to the at least one source region. The common silicided region can include a source silicided region, and a body tie silicided region situated over the heavily-doped body-implant region. The source silicided region can be separated from a drain silicided region by the gate fingers.

An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.

A calibration method for determining temperature set point corrections to be applied to the nominal temperature set points of each of the N heating zones of a heat treatment unit having L substrate locations, includes the following steps: establishing a sensitivity model linking variations of a substrate characteristic at each of M representative locations of the L locations to temperature set point variations applied in each of the N heating zones, the variations respectively reflecting differences with respect to a target characteristic and with respect to the nominal set points; executing the process in the heat treatment unit and on the basis of nominal set points; measuring the substrate characteristic at least at a representative measurement location of each heating zone of the unit to supply M measurements; and determining temperature set point corrections from the sensitivity model, the measurements and the target substrate characteristic.