H01L23/4951

MOLDED PACKAGING FOR WIDE BAND GAP SEMICONDUCTOR DEVICES

A semiconductor device package may include a leadframe having a first portion with first extended portions and a second portion with second extended portions. Mold material may encapsulate a portion of the leadframe and a portion of a semiconductor die mounted to the leadframe. A first set of contacts of the semiconductor die may be connected to a first surface of the first extended portions, while a second set of contacts may be connected to a first surface of the second extended portions. A mold-locking cavity having the mold material included therein may be disposed in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
20220238418 · 2022-07-28 · ·

The present invention provides a small and thin semiconductor device. The semiconductor device flip-chip bonds a semiconductor chip 1 and a lead 6 via a metal bonding portion 5 and includes a sealing resin covering them. The metal bonding portion 5 is provided with a gold-rich bonding layer 5a on the side of a first electrode 3a of the semiconductor chip 1 and a gold-rich bonding layer 5b on the side of a second electrode 3b of the lead 6, and connection between the semiconductor chip 1 and the lead 6 is strengthened, so that the semiconductor device does not require an anchor portion.

Electronic device and connection body

An electronic device has a sealing part 90, a first main terminal 11 protruding outward from the sealing part 90, a second main terminal 12 protruding outwardly from the sealing part, an electronic element 95 provided in the sealing part and having a front surface electrically connected to the first main terminal 11 and a back surface electrically connected to the second main terminal 12, a head part 40 connected to the front surface of the electronic element 95, a sensing terminal 13 protruding to an outside from the sealing part 90 and used for sensing and a connection part 35 integrally formed with the head part 40 and electrically connected to the sensing terminal 13. A current flowing through the sensing terminal 13 and the connection part 35 among a sensing current path does not overlap a main current path flowing through the second main terminal 12, the electronic element 95 and the first main terminal 11.

Current sensor package with continuous insulation

A current sensor package, comprises a current path and a sensing device. The sensing device is spaced from the current path, and the sensing device is configured for sensing a magnetic field generated by a current flowing through the current path. Further, the sensing device comprises a sensor element. The sensing device is electrically connected to a conductive trace. An encapsulant extends continuously between the current path and the sensing device.

Package structures
11211310 · 2021-12-28 · ·

A package structure is provided. The package structure includes a leadframe, a device, first protrusions, second protrusions, a conductive unit, and an encapsulation material. The device includes a substrate, an active layer, first electrodes, second electrodes and a third electrode. The first electrodes have different potentials than the second electrodes. The first electrodes and the second electrodes are arranged so that they alternate with each other. The first protrusions are disposed on each of the first electrodes. The second protrusions are disposed on each of the second electrodes. The first protrusions and the second protrusions are connected to the leadframe. The first side of the conductive unit is connected to the substrate of the device. The conductive unit is connected to the leadframe. The encapsulation material covers the device and the leadframe. The second side of the conductive unit is exposed from the encapsulation material.

SEMICONDUCTOR PACKAGE INCLUDING UNDERMOUNTED DIE WITH EXPOSED BACKSIDE METAL

A semiconductor package includes a semiconductor die with an active surface and an inactive surface, the active surface including metal pillars providing electrical connections to functional circuitry of the semiconductor die, and a backside metal layer on the inactive surface. The backside metal layer is attached to the inactive surface. The semiconductor package further includes a plurality of leads with each of the leads including an internal leadfinger portion and an exposed portion that includes a bonding portion. Distal ends of the metal pillars are in contact with and electrically coupled to the internal leadfinger portions. The backside metal layer is exposed on an outer surface of the semiconductor package. The bonding portions and the backside metal layer approximately planar to each other.

PACKAGE WITH DIES MOUNTED ON OPPOSING SURFACES OF A LEADFRAME
20210375730 · 2021-12-02 ·

A package includes a leadframe having first surface and a second surface opposing the first surface, the leadframe forming a plurality of leads, a first semiconductor die mounted on the first surface of the leadframe and electrically connected to at least one of the plurality of leads, a second semiconductor die mounted on the second surface of the leadframe, wire bonds electrically connecting the second semiconductor die to the leadframe, and mold compound at least partially covering the first semiconductor die, the second semiconductor die and the wire bonds.

METHOD OF MANUFACTURING SEMICONDUCTOR PRODUCTS, CORRESPONDING SUBSTRATE, SEMICONDUCTOR PRODUCT AND TOOL
20210375726 · 2021-12-02 · ·

In providing electrical wire-like connections between at least one semiconductor die arranged on a semiconductor die mounting area of a substrate and an array of electrically-conductive leads in the substrate, pressure force is applied to the electrically-conductive leads in the substrate during bonding the wire-like connections to the electrically-conductive leads. Such a pressure force is applied to the electrically-conductive leads in the substrate via a pair of mutually co-operating force transmitting surfaces. These surfaces include a first convex surface engaging a second concave surface.

POWER MODULE AND RELATED METHODS

Implementations of semiconductor packages may include a substrate, a first die coupled on the substrate, and a lead frame coupled over the substrate. The lead frame may include a die attach pad. Implementations of semiconductor packages may also include a second die coupled on the die attach pad. The second die may overlap the first die.

QFN/QFP PACKAGE WITH INSULATED TOP-SIDE THERMAL PAD

A packaged electronic device comprises a die attach pad enclosed by a package structure, a semiconductor die mounted to a side of the die attach pad, a conductive plate and a polymer layer having a first side on a side of the conductive plate and a second side on the die attach pad. A method of manufacturing a packaged electronic device comprises attaching a first side of a polymer layer to a first side of a conductive plate, attaching a first side of a die attach pad to a second side of the polymer layer and attaching a first side of a semiconductor die to a second side of the die attach pad.