H01L23/49513

SEMICONDUCTOR DEVICE
20220399253 · 2022-12-15 ·

Provided is a semiconductor device including: a lead frame having an upper surface provided with a concave portion and a lower surface provided with a convex portion; a semiconductor chip fixed to the upper surface of the lead frame; a solder layer provided in the concave portion and fixing the semiconductor chip to the upper surface of the lead frame; and a sealing resin for sealing the semiconductor chip and the lead frame. A thickness of the solder layer is larger than a depth of the concave portion. The sealing resin covers at least a part of the lower surface of the lead frame. At least a part of the convex portion of the lead frame is exposed from the sealing resin.

Electronic package, supporting structure and fabrication method thereof

A supporting structure is provided, which forms a protective layer on a metal member having a plurality of conductive posts, and the protective layer is exposed from end surfaces of the conductive posts, such that conductors are formed on the end surfaces of the conductive posts, thereby avoiding damage of the protective layer.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device includes a semiconductor element, a sealing member, and a first conductive plate. The semiconductor element includes a first electrode. The sealing member seals the semiconductor element. The first conductive plate includes a first surface facing the first electrode inside the sealing member. The first surface of the first conductive plate includes a mounting region, a roughened region and a non-roughened region. The first electrode is joined to the mounting region. The roughened region is located around the mounting region. The non-roughened region is located between the roughened region and an outer peripheral edge of the first surface. Surface roughness of the roughened region is larger than surface roughness of the non-roughened region.

Electronic device and method for manufacturing the same

An electronic device includes a support member and a mount member mounting on the support member. The support member and the mount member are sealed by a resin member. The support member includes a surface having a laser irradiation mark. The mount member includes a surface having a rough portion with an accumulation of material of the support member.

Method of manufacturing semiconductor devices and corresponding semiconductor device

Semiconductor dice are arranged on a substrate such as a leadframe. Each semiconductor die is provided with electrically-conductive protrusions (such as electroplated pillars or bumps) protruding from the semiconductor die opposite the substrate. Laser direct structuring material is molded onto the substrate to cover the semiconductor dice arranged thereon, with the molding operation leaving a distal end of the electrically-conductive protrusion to be optically detectable at the surface of the laser direct structuring material. Laser beam processing the laser direct structuring material is then performed with laser beam energy applied at positions of the surface of the laser direct structuring material which are located by using the electrically-conductive protrusions optically detectable at the surface of the laser direct structuring material as a spatial reference.

Semiconductor device
11521917 · 2022-12-06 · ·

A semiconductor device includes a chip that includes a mounting surface, a non-mounting surface, and a side wall connecting the mounting surface and the non-mounting surface and has an eaves portion protruding further outward than the mounting surface at the side wall and a metal layer that covers the mounting surface.

Plurality of heat sinks for a semiconductor package

Various embodiments may provide a semiconductor package. The semiconductor package may include a first electrical component, a second electrical component, a first heat sink, and a second heat sink bonded to a first package interconnection component and a second package interconnection component. The first package interconnection component and the second package interconnection component may provide lateral and vertical interconnections in the package.

Power die package
11515238 · 2022-11-29 · ·

A power die package includes a lead frame having a flag with power leads on one lateral side and signal leads on one or more other lateral sides. A power die is attached to a bottom surface of the flag and electrically connected to the power leads with a conductive epoxy. A control die is attached to a top surface of the flag and electrically connected to the signal leads with bond wires. A mold compound is provided that encapsulates the dies, the bond wires, and proximal parts of the leads, while distal ends of the leads are exposed, forming a PQFN package.

Method of Forming a Semiconductor Package with Connection Lug

A method includes providing a first lead frame that includes a first die pad and a first row of leads, providing a connection lug, mounting a first semiconductor die on the first die pad, the first semiconductor die including first and second voltage blocking terminals, electrically connecting the connection lug to one of the first and second voltage blocking terminals, electrically connecting a first one of the leads from the first row to an opposite one of the first and second voltage blocking terminals, and forming an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die. After forming the encapsulant body, the first row of leads each protrude out of a first outer face of the encapsulant body and the connection lug protrudes out of a second outer face of the encapsulant body.

Method of fabricating an electronic power module by additive manufacturing, and associated substrate and module

A method of fabricating an electronic power module by additive manufacturing, the electronic module including a substrate having an electrically insulating plate presenting opposite first and second faces, with a first metal layer arranged directly on the first face of the insulating plate, and a second metal layer arranged directly on the second face of the insulating plate. At least one of the metal layers is made by a step of depositing a thin layer of copper and a step of annealing the metal layer, and the method further includes a step of forming at least one thermomechanical transition layer on at least one of the first and second metal layers, the at least one thermomechanical transition layer including a material presenting a coefficient of thermal expansion that is less than that of the metal of the metal layer.