Patent classifications
H01L23/49524
Packaged stackable electronic power device for surface mounting and circuit arrangement
A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.
Multi-layer interconnection ribbon
A semiconductor package assembly includes a carrier with a die attach surface and a contact pad separated from the die attach surface, a semiconductor die mounted on the die attach surface, the semiconductor die having a front side metallization that faces away from the die attach surface, an interconnect ribbon attached to the semiconductor die and the contact pad such that the interconnect ribbon electrically connects the front side metallization to the contact pad, and an electrically insulating encapsulant body that encapsulates the semiconductor die and at least part of the interconnect ribbon. The interconnect ribbon includes a layer stack of a first metal layer and a second layer formed on top of the first metal layer. The first metal layer includes a different metal as the second metal layer. The first metal layer faces the front side metallization.
Semiconductor devices and methods of making the same
In one embodiment, methods for making semiconductor devices are disclosed.
SEMICONDUCTOR DEVICE
A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal that is connected to a first electrode of the semiconductor element; a second terminal that is connected to the first conductor portion; a connection member electrically connecting a control electrode of the semiconductor element and the second conductor portion to each other; a support member that is disposed at a predetermined distance from the second conductor portion; a pin terminal having that is supported in a state of being inserted through the support member and connected to the second conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, the semiconductor element, the connection member, and the support member.
SEMICONDUCTOR DEVICE
A semiconductor device includes: plural conductor portions formed on an insulating substrate; a semiconductor element disposed on one of the plural conductor portions on the insulating substrate; a support member that is disposed at a predetermined distance from one of the plural conductor portions on the insulating substrate; a columnar pin terminal that is supported by the support member and is connected to the one of the plural conductor portions on the insulating substrate from which the support member is disposed at the predetermined distance; and a sealing resin that seals the insulating substrate, the plural conductor portions, the semiconductor element, and the support member. The support member has a through-hole having a polygonal shape and penetrating in a plate thickness direction of the support member, and the pin terminal is supported by the support member in a state in which the pin terminal is inserted through the through-hole.
SEMICONDUCTOR DEVICE
A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal having a flat plate-shape that is connected to a first electrode of the semiconductor element; a second terminal having a flat plate-shape that is connected to the first conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, and the semiconductor element. Each of the first terminal and the second terminal includes: an inner terminal portion disposed inside the sealing resin; and an outer terminal portion disposed in a state of being exposed to an exterior of the sealing resin, and a female thread portion is provided in the outer terminal portion of each of the first terminal and the second terminal.
Power semiconductor module for PCB embedding, power electronic assembly having a power module embedded in a PCB, and corresponding methods of production
A power module for PCB embedding includes: a leadframe; a power semiconductor die with a first load terminal and control terminal at a first side of the die and a second load terminal at the opposite side, the second load terminal soldered to the leadframe; a first metal clip soldered to the first load terminal and forming a first terminal of the power module at a first side of the power module; and a second metal clip soldered to the control terminal and forming a second terminal of the power module at the first side of the power module. The leadframe forms a third terminal of the power module at the first side of the power module, or a third metal clip is soldered to the leadframe and forms the third terminal. The power module terminals are coplanar within +/−30 μm at the first side of the power module.
Integrated circuit package electronic device
A surface mount electronic device providing an electrical connection between an integrated circuit (IC) and a printed circuit board (PCB) is provided and includes a die and a dielectric material formed to cover portions of the die. Pillar contacts are electrically coupled to electronic components in the die and the pillar contacts extend from the die beyond an outer surface of the die. A conductive ink is printed on portions of a contact surface of the electronic device package and forms electrical terminations on portions of the dielectric material and electrical connector elements that connect an exposed end surface of the pillar contacts to the electrical terminations.
SEMICONDUCTOR PACKAGE HAVING MOLD LOCKING FEATURE
A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles comprising a first die paddle. The first die paddle comprises one or more through holes, one or more protrusions with grooves on top surfaces of the one or more protrusions, or one or more squeezed extensions. Each of the one or more through holes is filled with a respective portion of the molding encapsulation. Each of the one or more through holes may be of a rectangular shape, a rectangular shape with four filleted corners, a circular shape, or an oval shape. Each of the grooves is filled with a respective portion of the molding encapsulation. A respective side wall of each of the one or more squeezed extensions is of a swallowtail shape. The swallowtail shape directly contacts the molding encapsulation.
Wiring structure having stacked first and second electrodes
A wiring substrate includes a first metal plate and a second electrode. The first metal plate includes a first electrode, a wiring, and a mount portion for an electronic component. The mount portion includes an upper surface of the wiring. The second electrode is joined to an upper surface of the first electrode. The first electrode is solid. The second electrode is solid.