Semiconductor layers useable for minimizing or preventing the growth of metal whiskers, as well as devices and methods utilizing the same and kits for making the same, are described.

An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is provided that includes a first substrate containing first circuitry, a first contact pad, a first pillar, a first pillar protection layer, a second substrate containing second circuitry, and a solder ball disposed on the first pillar and electrically and mechanically coupling the first substrate to the second substrate. The first contact pad is disposed on the first substrate and coupled to the first circuitry. The first pillar electrically disposed over the first contact pad. The first pillar protection layer is hydrophobic to solder and is disposed on a side surface of the first pillar.

A conductive thin-film thinner than the undersurface electrode is provided outside the undersurface electrode on the undersurface of the ceramic substrate and connected to the undersurface electrode. A length from an outer circumferential part of the undersurface electrode to an outer circumferential pert of the ceramic substrate is equal to a length from an outer circumferential part of the top surface electrode to an outer circumferential part of the ceramic substrate. A thickness of the conductive thin-film is half or less than a thickness of the ceramic substrate.

An integrated circuit interconnects are described herein that are suitable for forming integrated circuit chip packages. In one example, an integrated circuit interconnect is provided that includes a first substrate containing first circuitry, a first contact pad, a first pillar, a first pillar protection layer, a second substrate containing second circuitry, and a solder ball disposed on the first pillar and electrically and mechanically coupling the first substrate to the second substrate. The first contact pad is disposed on the first substrate and coupled to the first circuitry. The first pillar electrically disposed over the first contact pad. The first pillar protection layer is hydrophobic to solder and is disposed on a side surface of the first pillar.

A fingerprint sensing structure includes a flexible substrate divided into a fingerprint-sensing region and a non-fingerprint-sensing region. In the non-fingerprint-sensing region, the fingerprint sensing structure includes a plurality of organic insulating layers, a wiring layer having conductive wires and at least one inorganic insulating layer, where the wiring layer is sandwiched between two organic insulating layers to render the portion of the fingerprint sensing structure corresponding to non-fingerprint-sensing region to have bending with curvature radius not larger than 2 mm. In the finger sensing region, the fingerprint sensing structure includes a thin film transistor layer and a sensing electrode layer. The thin film transistor layer includes a plurality of thin film transistors, a plurality of conductive wires respectively along a first direction and a second direction. The sensing electrode layer has a plurality of sensing electrodes to sense surface features of living organism.

Examples disclose a sensor for measuring a gas property, in particular a gas composition, more particularly a hydrogen level, wherein the sensor includes a semiconductor die, wherein the semiconductor die includes a measuring cavity, wherein a measuring sensor element is arranged in the measuring cavity, wherein the semiconductor die includes a contact pad, wherein the semiconductor die includes a buried conductor, wherein the buried conductor electrically connects the measuring sensor element to the contact pad, wherein a conductive bonding layer of the semiconductor die surrounds the measuring cavity for providing a conductive bonding surface, and wherein the buried conductor is insulated from the conductive bonding layer. Further examples, disclose methods for manufacturing a sensor.

A packaged semiconductor device includes a substrate having a first surface and a second surface opposite the first surface. At least one semiconductor die is mounted at the first surface of the substrate. Electrically-conductive leads are arranged around the substrate, and electrically-conductive formations couple the at least one semiconductor die to selected leads of the electrically-conductive leads. A package molding material is molded onto the at least one semiconductor die, onto the electrically-conductive leads and onto the electrically-conductive formations. The package molding material leaves the second surface of the substrate uncovered by the package molding material. The substrate is formed by a layer of electrically-insulating material.

Provided is a wiring structural body provided with a wiring pattern including a through-wiring pattern, the wiring structural body including: a silicon substrate having a through hole in which the through-wiring pattern is disposed; an insulating layer provided on a surface of the silicon substrate including an inner surface of the through hole along at least the wiring pattern; a boron layer provided on the insulating layer along the wiring pattern; and a metal layer provided on the boron layer.

A multi-level semiconductor device and a method of fabricating a multi-level semiconductor device involve a first interlayer dielectric (ILD) layer with one or more metal lines formed therein. A silicide is formed on a surface of the first ILD layer and is directly adjacent to each of the one or more metal lines on both sides of each of the one or more metal lines. A second ILD is formed above the silicide, and a via is formed through the second ILD above one of the one or more metal lines. One or more second metal lines are formed above the second ILD, one of which is formed in the via. The second metal line in the via contacts the one of the one or more metal lines and the silicide adjacent to the one of the one or more metal lines.

A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.