Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). For example, in some embodiments, an IC package support may include: a first conductive structure in a dielectric material; a second conductive structure in the dielectric material; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a polymer, and the material is different from the dielectric material. The material may act as a dielectric material below a trigger voltage, and as a conductive material above the trigger voltage.

A 3-D printed device comprising one or more structures, the structures comprising a plurality of magnetically responsive particles and one or more diblock or triblock copolymers; the diblock or triblock copolymers having an A-B, A-B-A, or A-B-C block-type structure in which the A-blocks and C-blocks are an aromatic-based polymer or an acrylate-based polymer and the B-blocks are an aliphatic-based polymer. These 3-D printed devices may be formed using a method that comprises providing a magnetic ink composition; applying the magnetic ink composition to a substrate in a 3-D solvent cast printing process to form one or more structures; and drying the one or more structures formed from the magnetic ink composition. The dried structures can exhibit one or more regions of magnetic permeability greater than 1.3×10.sup.−6 H/m.

An integrated circuit package having an electronic interposer comprising an upper section, a lower section and a middle section, a die side integrated circuit device electrically attached to the upper section of the electronic interposer, a die side heat dissipation device thermally contacting the die side integrated circuit device, a land side integrated circuit device electrically attached to the lower section of the electronic interposer, and a land side heat dissipation device thermally contacting the at least one die side integrated circuit device. The upper section and the lower section may each have between two and four layers and the middle section may be formed between the upper section and the lower section, and comprises up to eight layers, wherein a thickness of each layer of the middle section is thinner than a thickness of any of the layers of the upper section and the lower section.

Flexible devices including conductive traces with enhanced stretchability, and methods of making and using the same are provided. The circuit die is disposed on a flexible substrate. Electrically conductive traces are formed in channels on the flexible substrate to electrically contact with contact pads of the circuit die. A first polymer liquid flows in the channels to cover a free surface of the traces. The circuit die can also be surrounded by a curing product of a second polymer liquid.

A circuit board includes: a first substrate including a first through hole, a first metal layer formed over an inner wall of the first through hole, and a first conductive composite resin provided on an inner side of the first metal layer of the first through hole; and a second substrate stacked together with the first substrate and including a second through hole that faces the first through hole and has a first open end which is provided on a side of the first through hole and is located on the inner side of the first metal layer, and a second conductive composite resin that is provided in the second through hole and is coupled to the first conductive composite resin.

A silver paste composition for screen and/or 3D printing of interconnects of an integrated circuit chip on a metal oxide ink coated stainless steel substrate carrier comprising a mixture of two or more distinct range of sizes of electrically conductive silver particles, a resin in an amount from 0.05 to 10 wt. % of the silver paste composition, a solvent in an amount from 1 to 25 wt. % of the silver paste composition, such that the silver paste composition has silver particles containing calcium content of less than 20 ppm and a viscosity of 10 to 400 Pa.Math.s at a shear rate of 10 sec.sup.1 at 25 C.

A contact element for use between electronic components like computer chips and printed circuit boards, or the connection between an electronic component in a test socket to provide high current, high density, and high frequency connections between the electronic components. The contact element preferably achieves a good connection between electrical components when they are connected and pressed together. The contact element is preferably made of a conductive silicone rubber which has been plated.

Microelectronic integrated circuit package structures include a first layer over a substrate, the first layer having a matrix material and a filler material within the matrix material. A second layer is on the first layer, the second layer comprising the matrix material or a second material, where the filler material is substantially absent from the second layer. A first portion of a conductive feature is on the second layer and a second portion of the conductive feature is on a sidewall of the first layer.

A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.

Provided are a prepreg including two or more fiber substrate layers and one or more resin composition layers, in which at least one of the one or more resin composition layers has a fiber substrate layer on each of both surfaces thereof, a printed circuit board using the prepreg and a method of producing the printed circuit board, and a semiconductor package.