Patent classifications
H01L23/49888
Bump bonded cryogenic chip carrier
A device has a first stack of thin films, the first stack of thin films having a first opposing surface and a first connection surface, wherein the first connection surface contacts a first superconducting region; a second stack of thin films, the second stack of thin films having a second opposing surface and a second connection surface, wherein the second connection surface contacts a second superconducting region; and a superconducting bump bond electrically connecting the first and second opposing surfaces, the superconducting bump bond maintaining a low ohmic electrical contact between the first and second opposing surfaces at temperatures below 100 degrees Kelvin, wherein at least one of the first or second superconducting regions comprise material with a melting point of at least 700 degrees Celsius.
SUPERCONDUCTING APPARATUS INCLUDING SUPERCONDUCTING LAYERS AND TRACES
Methods and structures corresponding to superconducting apparatus including superconducting layers and traces are provided. A method for forming a superconducting apparatus includes forming a first dielectric layer on a substrate by depositing a first dielectric material on the substrate and curing the first dielectric material at a first temperature. The method further includes forming a first superconducting layer comprising a first set of patterned superconducting traces on the first dielectric layer. The method further includes forming a second dielectric layer on the first superconducting layer by depositing a second dielectric material on the first superconducting layer and curing the second dielectric material at a second temperature, where the second temperature is lower than the first temperature. The method further includes forming a second superconducting layer comprising a second set of patterned superconducting traces on the second dielectric layer.
Integrated circuit having a heat sink coupled to separate ground planes through vias with different thermal characteristics
An integrated circuit is provided that comprises a thermal sink layer, a first ground plane associated with a first set of circuits that have a first operational temperature requirement, and a first thermally conductive via that couples the first ground plane to the thermal sink layer. The circuit further comprises a second ground plane associated with a second set of circuits that have a second operational temperature requirement that is higher than the first operational temperature requirement, and a second thermally conductive via that couples the second ground plane to the thermal sink layer, wherein the first thermally conductive via has a greater volume of thermal conductive material than the second thermally conductive via to remove heat from the first set of circuits with less gradient than the second set of circuits.
Bump bonded cryogenic chip carrier
A technique relates to a device. First thin films are characterized by having a first opposing surface and a first connection surface in which the first connection surface is in physical contact with a first superconducting region. Second thin films are characterized by having a second opposing surface and a second connection surface in which the first and second opposing surfaces are opposite one another. The second connection surface is in physical contact with a second superconducting region. A solder material electrically connects the first and second opposing surfaces, and the solder material is characterized by maintaining a low ohmic electrical contact between the first and second opposing surfaces at temperatures below 100 degrees Kelvin. The first and second superconducting regions are formed of materials that have a melting point of at least 700 degrees Celsius.
Low-noise microwave amplifier utilizing superconductor-insulator-superconductor junction
A low-noise wide band amplifier is realized utilizing a superconductor-insulator-superconductor (SIS) junction, quasiparticle frequency mixers connected in tandem or in cascade, a first quasiparticle mixer performs first frequency mixing with use of a first local signal having a frequency not less than twice a frequency of an input signal to the first quasiparticle mixer, a second quasiparticle mixer performs second frequency mixing with use of a second local signal having a frequency not more than twice a frequency of an input signal to the second quasiparticle mixer, and signal amplification is performed through frequency conversion by extracting, from among a plurality of signals generated with the first and the second frequency mixing, a signal in a frequency band not more than a frequency band of the signal before the first frequency mixing and the second frequency mixing, using a transmission line or a filter.
Method of forming superconducting apparatus including superconducting layers and traces
Methods and structures corresponding to superconducting apparatus including superconducting layers and traces are provided. A method for forming a superconducting apparatus includes forming a first dielectric layer on a substrate by depositing a first dielectric material on the substrate and curing the first dielectric material at a first temperature. The method further includes forming a first superconducting layer comprising a first set of patterned superconducting traces on the first dielectric layer. The method further includes forming a second dielectric layer on the first superconducting layer by depositing a second dielectric material on the first superconducting layer and curing the second dielectric material at a second temperature, where the second temperature is lower than the first temperature. The method further includes forming a second superconducting layer comprising a second set of patterned superconducting traces on the second dielectric layer.
Thermally isolated ground planes with a superconducting electrical coupler
An integrated circuit is provided that comprises a first ground plane associated with a first set of circuits that have a first operational temperature requirement, and a second ground plane associated with a second set of circuits that have a second operational temperature requirement that is higher than the first operational temperature requirement. The second ground plane is substantially thermally isolated from the first ground plane. A superconducting coupler electrically couples the first ground plane and the second ground plane while maintaining relative thermal isolation between the first ground plane and the second ground plane.
Cryogenic electronic packages and assemblies
A cryogenic electronic package includes a circuitized substrate, an interposer, a superconducting multichip module (SMCM) and at least one superconducting semiconductor structure. The at least one superconducting semiconductor structure is disposed over and coupled to the SMCM, and the interposer is disposed between the SMCM and the substrate. The SMCM and the at least one superconducting semiconductor structure are electrically coupled to the substrate through the interposer. A cryogenic electronic assembly including a plurality of cryogenic electronic packages is also provided.
SUPERCONDUCTING BUMP BONDS
A device includes a first chip having a first circuit element, a first interconnect pad in electrical contact with the first circuit element, and a barrier layer on the first interconnect pad, a superconducting bump bond on the barrier layer, and a second chip joined to the first chip by the superconducting bump bond, the second chip having a first quantum circuit element, in which the superconducting bump bond provides an electrical connection between the first circuit element and the first quantum circuit element.
SUPERCONDUCTING BUMP BONDS
A device includes a first chip having a first circuit element, a first interconnect pad in electrical contact with the first circuit element, and a barrier layer on the first interconnect pad, a superconducting bump bond on the barrier layer, and a second chip joined to the first chip by the superconducting bump bond, the second chip having a first quantum circuit element, in which the superconducting bump bond provides an electrical connection between the first circuit element and the first quantum circuit element.