An infrared detector. The detector includes: a superlattice structure including: at least three first layers; and at least three second layers, alternating with the first layers. Each of the first layers includes, as a major component, InAs.sub.xP.sub.1-x, wherein x is between 0.0% and 99.0%, and each of the second layers includes, as a major component, InAs.sub.ySb.sub.1-y, wherein y is between 0% and 60%.

A linear mode avalanche photodiode senses light and outputs electrical current by being configured to, generate a gain equal to or greater than 1000 times amplification while generating an excess noise factor of less than 3 times a thermal noise present at or above a non-cryogenic temperature due to the gain from the amplification. The linear mode avalanche photodiode detects one or more photons in the light by using a superlattice structure that is matched to suppress impact ionization for a first carrier in the linear mode avalanche photodiode while at least one of 1) increasing impact ionization, 2) substantially maintaining impact ionization, and 3) suppressing impact ionization to a lesser degree for a second carrier. The first carrier having its impact ionization suppressed is either i) an electron or ii) a hole; and then, the second carrier is the electron or the hole.

Devices, systems, and methods are provided for reducing electrical and optical crosstalk in photodiodes. A photodiode may include a first layer with passive material, the passive material having no electric field. The photodiode may include a second layer with an absorbing material, the second layer above the first layer. The photodiode may include a diffused region with a buried p-n junction. The photodiode may include an active region with the buried p-n junction and having an electric field greater than zero. The photodiode may include a plateau structure based on etching through the second layer to the first layer, the etching performed at a distance of fifteen microns or less from the buried p-n junction.

A structure is disclosed. The structure contains a second detector disposed above a first detector, wherein the first detector contains a first absorber layer, a first barrier layer disposed above the first absorber layer, a first contact layer disposed above the first barrier layer, and wherein the second detector contains a second contact layer disposed above the first contact layer, a second barrier layer disposed above the second contact layer, a second absorber layer disposed above the second barrier layer.

A semiconductor crystal substrate includes a crystal substrate that is formed of a material including GaSb or InAs, a first buffer layer that is formed on the crystal substrate and formed of a material including GaSb, the first buffer layer having n-type conductivity, and a second buffer layer that is formed on the first buffer layer and formed of a material including GaSb, the second buffer layer having p-type conductivity.

A semiconductor laminate includes a substrate composed of InP, a first buffer layer composed of InP containing less than 1×10.sup.21 cm.sup.−3 Sb and disposed on the substrate, and a second buffer layer composed of InGaAs and disposed on the first buffer layer. The first buffer layer includes a first layer that has a higher concentration of Sb than the substrate and that is arranged to include a first main surface which is a main surface of the first buffer layer on the substrate side. The second buffer layer includes a second layer that has a lower concentration of Sb than the first layer and that is arranged to include a second main surface which is a main surface of the second buffer layer on the first buffer layer side.

Techniques are disclosed for facilitating detection of electromagnetic radiation using superlattice-based detector systems and methods. In one example, an infrared detector includes a first superlattice structure including first periods. Each of the first periods includes a first sub-layer and a second sub-layer adjacent to the first sub-layer. The first and second sub-layers include first and second semiconductor materials. The infrared detector further includes a second superlattice structure disposed on the first superlattice structure. The second superlattice structure includes second periods. Each of the second periods includes a third sub-layer and a fourth sub-layer adjacent to the third sub-layer. The third-sub-layer includes a third semiconductor material. The fourth sub-layer includes a fourth semiconductor material. A p-n junction is formed at an interface within the second superlattice structure or at an interface between the first and second superlattice structures.

An infrared detector and an infrared sensor including the infrared detector are provided. The infrared detector includes a plurality of quantum dots spaced apart from each other and including a first component, a first semiconductor layer covering the plurality of quantum dots, and a second semiconductor layer covering the first semiconductor layer.

Provided is an imaging device including: a pixel region including a first photoelectric converter; an outside-pixel region including a second photoelectric converter coupled to a predetermined electric potential; and a circuit substrate having one surface on which the first photoelectric converter and the second photoelectric converter are provided, and including a peripheral circuit electrically coupled to the first photoelectric converter.

A substrate includes a plurality of pixels arranged in a two-dimensional array structure and has a front side and a back side opposite to the front side. An interconnection is arranged on the front side of the substrate. An insulating layer, a color filter, and a micro-lens are arranged on the back side of the substrate. A pixel separation structure is disposed in the substrate. The pixel separation structure includes a conductive layer having a grid structure in a planar view of the image sensor and surrounds each of the plurality of pixels. A back side contact is vertically overlapped with and electrically connected to a grid point portion of the grid structure of the conductive layer of the pixel separation structure.