A stacked III-V semiconductor photonic device having a second metallic terminal contact layer at least formed in regions, a highly doped first semiconductor contact region of a first conductivity type, a very low doped absorption region of the first or second conductivity type having a layer thickness of 20 μm-2000 μm, a first metallic terminal contact layer, wherein the first semiconductor contact region extends into the absorption region in a trough shape, the second metallic terminal contact layer is integrally bonded to the first semiconductor contact region and the first metallic terminal contact layer is arranged below the absorption region. In addition, the stacked III-V semiconductor photonic device has a doped III-V semiconductor passivation layer of the first or second conductivity type, wherein the III-V semiconductor passivation layer is arranged at a first distance of at least 10 μm to the first semiconductor contact region.

A solar cell stack includes a first semiconductor solar cell having a p-n junction made of a first material with a first lattice constant, a second semiconductor solar cell having a p-n junction made of a second material with a second lattice constant, and the first lattice constant being at least 0.008 Å smaller than the second lattice constant, and a metamorphic buffer. The metamorphic buffer is formed between the first semiconductor solar cell and the second semiconductor solar cell. The metamorphic buffer includes a series of at least five layers. The lattice constant increases in the series in the direction of the semiconductor solar cell. The lattice constants of the layers of the metamorphic buffer are larger than the first lattice constant. Two layers of the buffer having a doping and the difference in the dopant concentration between the two layers being greater than 4E.sup.17 cm.sup.−3.

A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the first aluminum-containing layer and the active region, wherein the confinement layer includes a thickness smaller than the thickness of one of the barrier layers; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies in the electron blocking region.

Barrier infrared detectors configured to operate in the long-wave (LW) infrared regime are provided. The barrier infrared detector systems may be configured as pin, pbp, barrier and double heterostructrure infrared detectors incorporating optimized p-doped absorbers capable of taking advantage of high mobility (electron) minority carriers. The absorber may be a p-doped Ga-free InAs/InAsSb material. The p-doping may be accomplished by optimizing the Be doping levels used in the absorber material. The barrier infrared detectors may incorporate individual superlattice layers having narrower periodicity and optimization of Sb composition to achieve cutoff wavelengths of ˜10 μm.

Dilute nitride subcells with graded doping are disclosed. Dilute nitride subcells having graded doping display improved efficiency, short circuit current density, and open circuit voltage.

A quantum cascade detector includes a semiconductor substrate; an active layer having a cascade structure; a lower cladding layer provided between the active layer and the substrate and having a lower refractive index than the active layer; a lower metal layer provided between the lower cladding layer and the substrate; an upper cladding layer provided on an opposite side to the substrate with respect to the active layer and having a lower refractive index than the active layer; and an upper metal layer provided on an opposite side to the active layer with respect to the upper cladding layer. A first end face being in a waveguide direction in a waveguide structure with the active layer, lower cladding layer, and upper cladding layer is an entrance surface for light to be detected.

The present invention refers to a photovoltaic cell (1) comprising a heterojunction with a base layer (L4, L4′, L4″) made from an Aluminium-Ar-senic-basedalloy and an emitter layer (L3, L3′) made from an Indium-Phosphorous based alloy wherein the emitter layer (L3, L3′) has a thickness smaller than 100 nm and acts as a passivation layer to prevent oxidation of the base layer and reduces surface recombination (L4, L4′, L4″).

Isoelectronic co-doping of semiconductor compounds and alloys with acceptors and deep donors is used to decrease bandgap, to increase concentration of the dopant constituents in the resulting alloys, and to increase carrier mobilities lifetimes. For example, Group III-V compounds and alloys, such as GaAs and GaP, are isoelectronically co-doped with, for example, B and Bi, to customize solar cells, and other semiconductor devices. Isoelectronically co-doped Group II-VI compounds and alloys are also included.

An epitaxial wafer which allows manufacture of a photodiode having suppressed dark current and ensured sensitivity, and a method for manufacturing the epitaxial wafer, are provided. The epitaxial wafer of the present invention includes: a III-V semiconductor substrate; and a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a first layer and a second layer. The total concentration of elements contained as impurities in the multiple quantum well structure is less than or equal to 5×10.sup.15 cm.sup.−3.

In this photoelectric conversion element wherein group III-IV compound semiconductor single crystals containing zinc as an impurity are used as a substrate, the substrate is increased in size without lowering conversion efficiency. A heat-resistant crucible is filled with raw material and a sealant, and the raw material and sealant are heated, thereby melting the raw material into a melt, softening the encapsulant, and covering the melt from the top with the encapsulant. The temperature inside the crucible is controlled such that the temperature of the top of the encapsulant relative to the bottom of the encapsulant becomes higher in a range that not equal or exceed the temperature of bottom of the encapsulant, and seed crystal is dipped in the melt and pulled upward with respect to the melt, thereby growing single crystals from the seed crystal. Thus, a large compound semiconductor wafer that is at least two inches in diameter and has a low dislocation density of 5,000 cm.sup.−2 can be obtained, despite having a low average zinc concentration of 5×10.sup.17 cm.sup.−3 to 3×10.sup.18 cm.sup.−3, at which a crystal hardening effect does not manifest.