The invention relates to an optoelectronic device, having at least one microwire or nanowire extending along a longitudinal axis substantially orthogonal to a plane of a substrate, and including: a first doped portion produced from a first semiconductor compound; an active zone extending from the first doped portion; a second doped portion, at least partially covering the active zone; characterised in that the active zone comprises a wider single-crystal portion: formed of a single crystal of a second semiconductor compound and at least one additional element; extending from an upper face of one end of the first doped portion, and having a mean diameter greater than that of the first doped portion.

An electro-optically triggered power switch is disclosed utilizing a wide bandgap, high purity III-nitride semiconductor material such as BN, AlN, GaN, InN and their compounds. The device is electro-optically triggered using a laser diode operating at a wavelength of 10 to 50 nanometers off the material's bandgap, and at a power level of 10 to 100 times less than that required in a conventionally triggered device. The disclosed device may be configured as a high power RF MOSFET, IGBT, FET, or HEMT that can be electro-optically controlled using photons rather than an electrical signal. Electro-optic control lowers the power losses in the semiconductor device, decreases the turn-on time, and simplifies the drive signal requirements. It also allows the power devices to be operated from the millisecond to the sub-picosecond timeframe, thus allowing the power device to be operated at RF frequencies (i.e., kilohertz to terahertz range) and at high temperatures where the bandgap changes with temperature.

The method for growing an elongate element (5), notably a wire of nanowire or microwire type, includes forming a nucleation surface (3) having at least one germination site adopting the form of a germination hollow (7) and delimited at least partly by a mask (2), the at least one germination hollow (7) being situated at a distance from the mask (2), performing nucleation of a seed (4) intended to participate in the growth of the elongate element (5) on the at least one germination hollow (7), and growing the elongate element (5) from the seed (4).

Gallium nitride based semiconductors are provided having one or more passivated surfaces. The surfaces can have a plurality of thiol compounds attached thereto for enhancement of optoelectronic properties and/or solar water splitting properties. The surfaces can also include wherein the surface has been treated with chemical solution for native oxide removal and/or wherein the surface has attached thereto a plurality of nitrides, oxides, insulating compounds, thiol compounds, or a combination thereof to create a treated surface for enhancement of optoelectronic properties and/or solar water splitting properties. Methods of making the gallium nitride based semiconductors are also provided. Methods can include cleaning a native surface of a gallium nitride semiconductor to produce a cleaned surface, etching the cleaned surface to remove oxide layers on the surface, and applying single or multiple coatings of nitrides, oxides, insulating compounds, thiol compounds, or a combination thereof attached to the surface.

A pn heterojunction diode includes a p-GaN substrate, a layer of -Ga.sub.2O.sub.3 on a surface of the p-GaN substrate, an n contact disposed on a surface of the -Ga.sub.2O.sub.3 layer opposite the p-GaN substrate, and a p contact disposed on the surface of the p-GaN substrate and proximate the GaN substrate. Fabricating a pn heterojunction diode includes depositing a metal on a first surface of a -Ga.sub.2O.sub.3 wafer to form a first contact on the first surface of the -Ga.sub.2O.sub.3 wafer, adhering the first contact to an adhesive material, thereby exposing a second surface of the -Ga.sub.2O.sub.3 wafer, wherein the second surface is opposite the first surface, exfoliating layers of the -Ga.sub.2O.sub.3 wafer from the second surface to yield an exfoliated surface on the -Ga.sub.2O.sub.3 wafer, and contacting the exfoliated surface with a surface of a p-GaN substrate to yield a stack.

Semiconductor optoelectronic devices having a dilute nitride active region are disclosed. In particular, the semiconductor devices have a dilute nitride active region with at least two bandgaps within a range from 0.7 eV and 1.4 eV. Photodetectors comprising a dilute nitride active region with at least two bandgaps have a reduced dark current when compared to photodetectors comprising a dilute nitride active region with a single bandgap equivalent to the smallest bandgap of the at least two bandgaps.

One embodiment provides a semiconductor device comprising: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the first semiconductor layer; a third semiconductor layer disposed on the second semiconductor layer; and a reflective layer disposed on the third semiconductor layer, wherein the part between the first and second semiconductor layers, the part between the third and second semiconductor layers, and the second semiconductor layer comprise a depletion region, and the conductivity of the first semiconductor layer and the conductivity of the third semiconductor layer are different from each other, and the second semiconductor layer comprises an intrinsic semiconductor layer.

High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular embodiment of the present technology includes a carrier substrate, a first terminal, a second terminal and a plurality of SST dies connected in series between the first and second terminals. The individual SST dies can include a transducer structure having a p-n junction, a first contact and a second contact. The transducer structure forms a boundary between a first region and a second region with the carrier substrate being in the first region. The first and second terminals can be configured to receive an output voltage and each SST die can have a forward junction voltage less than the output voltage.

A nitride semiconductor substrate includes a sapphire substrate and a nitride semiconductor layer formed thereon and containing a group III element including Al and nitrogen as a main component. A surface of the sapphire substrate where the nitride semiconductor layer is formed includes recesses having a maximum opening size of from 2 nm to 60 nm in an amount of from 110.sup.9 pieces to 110.sup.11 pieces per cm.sup.2. The recesses and surfaces immediately above the recesses form spaces. Of a surface of the nitride semiconductor layer on the sapphire substrate side, a height difference H between a surface immediately above of each recess and a surface in contact with a flat surface is 10 nm or less. A portion of the nitride semiconductor layer above each recess has a crystalline structure produced by growth along a polar plane of the group III element.

A free-standing substrate of a polycrystalline nitride of a group 13 element is composed of a plurality of monocrystalline particles having a particular crystal orientation in approximately a normal direction. The free-standing substrate has a top surface and a bottom surface. The polycrystalline nitride of the group 13 element is gallium nitride, aluminum nitride, indium nitride or a mixed crystal thereof and contains zinc at a concentration of 110.sup.17 atoms/cm.sup.3 or more and 110.sup.20 atoms/cm.sup.3 or less.