H01L31/03046

P-compensated and P-doped superlattice infrared detectors

Barrier infrared detectors configured to operate in the long-wave (LW) infrared regime are provided. The barrier infrared detector systems may be configured as pin, pbp, barrier and double heterostructrure infrared detectors incorporating optimized p-doped absorbers capable of taking advantage of high mobility (electron) minority carriers. The absorber may be a p-doped Ga-free InAs/InAsSb material. The p-doping may be accomplished by optimizing the Be doping levels used in the absorber material. The barrier infrared detectors may incorporate individual superlattice layers having narrower periodicity and optimization of Sb composition to achieve cutoff wavelengths of ˜10 μm.

WAVEGUIDE PHOTODETECTOR
20230178666 · 2023-06-08 · ·

A ridge structure (7) including at least a light-absorbing layer (4) is provided on a semiconductor substrate (1). A semiconductor embedding layer (8) has a refractive index lower than that of the light-absorbing layer (4) and embeds a side surface of the light-absorbing layer (4). A semiconductor layer (13) has a refractive index between that of the light-absorbing layer (4) and that of the semiconductor embedding layer (8) and is provided between the side surface of the light-absorbing layer (4) and the semiconductor embedding layer (8). The refractive index of the semiconductor layer (13) is n3, a wavelength of the incident light (15) is λ, a thickness of the semiconductor layer (13) in a lateral direction is in a range of-30% to +20% of λ/(4xn3).

SUBSTRATE FOR OPTICAL DEVICE, METHOD OF MANUFACTURING THE SAME, OPTICAL DEVICE INCLUDING THE SUBSTRATE FOR OPTICAL DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS INCLUDING OPTICAL DEVICE
20230170430 · 2023-06-01 · ·

Provided is a high-quality substrate including a silicon layer, a multilayer buffer layer on the silicon layer, and an indium phosphide (InP) layer on the multilayer buffer layer, wherein a crystal growth direction of the silicon layer is a direction inclined by 1° to 10° with respect to a vertical direction, and wherein the multilayer buffer layer includes a buffer layer in which a crystal growth direction is inclined with respect to the vertical direction.

Multijunction solar cells
11264524 · 2022-03-01 · ·

A multijunction solar cell including an upper first solar subcell and having an emitter of p conductivity type with a first band gap, and a base of n conductivity type with a second band gap greater than the first band gap; a second solar subcell having an emitter of p conductivity type with a third band gap, and a base of n conductivity type with a fourth band gap greater than the third band gap; and an intermediate grading interlayer disposed between the first and second subcells and having a graded lattice constant that matches the first subcell on a first side and the second subcell on the second side, and having a fifth band gap that is greater than the second band gap of the first solar subcell.

OPTICAL SENSING DEVICE AND OPTICAL SENSING SYSTEM THEREOF

This disclosure discloses an optical sensing device. The device includes a carrier body having a topmost surface; a first light-emitting device disposed on the carrier body and having a light-emitting surface; and a light-receiving device comprising a group III-V semiconductor material disposed on the carrier body and having a light-receiving surface. The light-emitting surface is separated from the topmost surface by first distant H1, the light-receiving surface is separated from the topmost surface by a second distance H2, and H1 is different from H2.

Method For Manufacturing A Semiconductor Device And Semiconductor Device
20170309482 · 2017-10-26 · ·

This invention is directed toward a method for manufacturing a semiconductor device with a heterostructure comprises covering a semiconductor structure with a seed layer structure; forming one or more separated circularly shaped openings in the seed layer structure to expose the semiconductor structure therein, and leave the seed layer structure outside the one or more separated circularly shaped openings; forming an insulator layer thereon; etching the obtained structure to (i) expose at least a portion of the seed layer structure, such that the exposed at least portion of the seed layer structure surrounds each of the one or more separated circularly shaped openings, and (ii) optionally expose the semiconductor structure, in the one or more separated circularly shaped openings; and epitaxially growing a semiconductor layer from the exposed at least portion of the seed layer structure, firstly mainly vertically and then into each of the one or more separated circularly shaped openings until the epitaxially grown semiconductor layer coalesces with the insulator layer or the semiconductor structure in each of the one or more separated circularly shaped openings.

Unipolar barrier dual-band infrared detectors

Dual-band barrier infrared detectors having structures configured to reduce spectral crosstalk between spectral bands and/or enhance quantum efficiency, and methods of their manufacture are provided. In particular, dual-band device structures are provided for constructing high-performance barrier infrared detectors having reduced crosstalk and/or enhance quantum efficiency using novel multi-segmented absorber regions. The novel absorber regions may comprise both p-type and n-type absorber sections. Utilizing such multi-segmented absorbers it is possible to construct any suitable barrier infrared detector having reduced crosstalk, including npBPN, nBPN, pBPN, npBN, npBP, pBN and nBP structures. The pBPN and pBN detector structures have high quantum efficiency and suppresses dark current, but has a smaller etch depth than conventional detectors and does not require a thick bottom contact layer.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR COMPONENT

The present disclosure provides a semiconductor device and a semiconductor component. The semiconductor device includes an active structure, a ring-shaped semiconductor contact layer, a first electrode, and an insulating layer. The active structure has a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer located between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer. The ring-shaped semiconductor contact layer is located on the second-conductivity-type semiconductor layer and having a first inner sidewall and a first outer sidewall. The first electrode has an upper surface and covers the ring-shaped semiconductor contact layer. The insulating layer covers the first electrode and the active structure and has a second inner sidewall and a second outer sidewall. The first inner sidewall is not flush with the second inner sidewall in a vertical direction.

ACTIVE PHOTONIC DEVICE HAVING A DARLINGTON CONFIGURATION WITH FEEDBACK
20170301818 · 2017-10-19 ·

Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

Multijunction metamorphic solar cells
11670728 · 2023-06-06 · ·

A multijunction solar cell including interconnected first and second discrete semiconductor regions disposed adjacent and parallel to each other including first top solar subcell, second (and possibly third) lattice matched middle solar subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein an opening is provided from the bottom side of the semiconductor substrate to one or more of the solar subcells so as to allow a discrete electrical connector to be made extending in free space and to electrically connect contact pads on one or more of the solar subcells.