The patent application relates to a PN junction as well as the preparation method and use thereof. Said PN junction comprises a p-type CIGS semiconductor thin film layer and an n-type CIGS semiconductor thin film layer, wherein the n-type CIGS semiconductor thin film layer comprises or consists essentially of elements Cu, In, Ga and Se, where the Cu to In molar ratio is within the range of 1.1 to 1.5, and has a chemical formula of Cu(In.sub.xGa.sub.1-x)Se.sub.2, where x is within the range of 0.6 to 0.9. The patent application further relates to a semiconductor thin film element comprising said PN junction, in particular a photodiode element, and a photoelectric sensing module comprising said semiconductor thin film element as well as the various uses thereof.

Methods for dry plasma etching thin layers of material including Cu(In, Ga)Se, e.g., CIGS material on semiconductor substrates are provided. A method of etching a CIGS material layer such as copper indium gallium selenide film, includes: flowing an etching gas including a mixture of gases into a process chamber having a substrate disposed therein, the substrate including a copper indium gallium selenide layer having a patterned film stack disposed thereon, the patterned film stack covering a first portion of the copper indium gallium selenide layer and exposing a second portion of the copper indium gallium selenide layer; and contacting the copper indium gallium selenide layer with the etching gas to remove the second portion and form one or more copper indium gallium selenide edges of the first portion.

Methods of fabricating photovoltaic cells are provided. The photovoltaic cells include a transparent substrate to allow light to enter the photovoltaic cell through the substrate, and a light absorption layer associated with the substrate. The light absorption layer has opposite first and second surfaces, with the first surface being closer to the transparent substrate than the second surface. A passivation layer is disposed over the second surface of the light absorption layer, and a plurality of first discrete contacts and a plurality of second discrete contacts are provided within the passivation layer to facilitate electrical coupling to the light absorption layer. A first electrode and a second electrode are disposed over the passivation layer to contact the plurality of first discrete contacts and the plurality of second discrete contacts, respectively. The first and second electrodes may include a photon-reflective material.

A method (200) for fabricating patterns on the surface of a layer of a device (100), the method comprising: providing at least one layer (130, 230); adding at least one alkali metal (235) comprising Cs and/or Rb; controlling the temperature (2300) of the at least one layer, thereby forming a plurality of self-assembled, regularly spaced, parallel lines of alkali compound embossings (1300, 1305) at the surface of the layer. The method further comprises forming cavities (236, 1300) by dissolving the alkali compound embossings. The method (200) is advantageous for nanopatterning of devices (100) without using templates and for the production of high efficiency optoelectronic thin-film devices (100).

A solid-state imaging device includes a substrate and a photoelectric conversion region. The substrate has a charge accumulation region. The photoelectric conversion region is provided on the substrate. The photoelectric conversion region is configured to generate signal charges to be accumulated in the charge accumulation region. The photoelectric conversion region comprises a material that is not transparent.

A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.

An item may include circuitry, a battery that powers the circuitry, and one or more photovoltaic cells that are used to recharge the battery. The photovoltaic cell may be a thin-film photovoltaic cell with a flexible substrate. The flexible substrate may be formed from fabric, leather, polymer, or other soft materials. In arrangements where the substrate is formed from fabric with conductive strands, the photovoltaic cell may include a first electrical terminal coupled to a first conductive strand and a second electrical terminal coupled to a second conductive strand. The first and second conductive strands may be coupled to control circuitry. The control circuitry may route the electricity from the photovoltaic cell to a battery or other circuitry. Items such as cases, covers, bands, headphones, interiors, and other items may have flexible or soft surfaces that can form substrates for photovoltaic films.

An aspect of the present disclosure is a perovskite that includes A.sub.(n1nw+w)A.sub.(wnw)A.sub.2B.sub.nX.sub.(3n3zn+3z4e+1)X.sub.(3zn3z)X.sub.4e, where each of A, A, A are monovalent cations, B is a divalent cation, each of X, X, and X are monovalent anions, 0<w1, 0<z1, 0<e1, and 1n100000.

A multijunction solar cell includes a base substrate comprising a Group IV semiconductor and a dopant of a first carrier type. A patterned emitter is formed at a first surface of the base substrate. The patterned emitter comprises a plurality of well regions doped with a dopant of a second carrier type in the Group IV semiconductor. The base substrate including the patterned emitter form a first solar subcell. The multijunction solar cell further comprises an upper structure comprising one or more additional solar subcells over the first solar subcell. Methods of making a multijunction solar cell are also described.

Methods of making a semiconductor layer from nanocrystals are disclosed. A film of nanocrystals capped with a ligand can be deposited onto a substrate; and the nanocrystals can be irradiated with one or more pulses of light. The pulsed light can be used to substantially remove the ligands from the nanocrystals and leave the nanocrystals unsintered or sintered, thereby providing a semiconductor layer. Layered structures comprising these semiconductor layers with an electrode are also disclosed. Devices comprising such layered structures are also disclosed.