Patent classifications
H01L31/03685
ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF
To provide an electronic component having a protective film formed with good uniformity, over the entire surface thereof. The electronic component has a protective film formed over the entire surface thereof, and the electronic component has elements and wirings formed on a base body. The protective film is formed by a CVD method, over an entire surface of the electronic component, by: arranging an electrode in a chamber; grounding one side of the chamber and the electrode; accommodating the electronic component in the chamber; supplying a raw material gas to the chamber; rotating or swinging the chamber and thereby moving the electronic component in the chamber; supplying high-frequency power to the other side of the chamber and the electrode; and generating a raw-material-gas-based plasma between the electrode and the chamber.
Solar cell apparatus and method for forming the same for single, tandem and heterojunction systems
A solar cell apparatus 100 and a method for forming said solar cell apparatus 100, comprising a substrate 101, a n-type transparent conductive oxide (TCO) layer 102 deposited atop said substrate 101, a p-i-n structure 200 that includes a p-type layer 103, an i-type layer 104, a n-type layer 105, a metal back layer 106 deposited atop said n-type layer 105 of the p-i-n structure 200. The n-type layer 105 comprises n-type donors 115 including phosphorus atoms. The n-type donors 115 include oxygen atoms at an atomic concentration comprised between 5% and 25% of the overall atomic composition of the n-type layer 105.
Solar cell and method for manufacturing the same
A solar cell can include a silicon substrate; a tunnel layer disposed on a first surface of the silicon substrate, the tunnel layer including a dielectric material; a polycrystalline silicon layer disposed on the tunnel layer; a dielectric layer disposed on the polycrystalline silicon layer; and an electrode penetrating through the dielectric layer and directly contacting with the polycrystalline silicon layer, wherein the polycrystalline silicon layer includes a metal crystal region positioned at a region where the polycrystalline silicon layer contacts the electrode, and wherein the metal crystal region includes a plurality of metal crystals, the plurality of metal crystals including a metal material same as a metal material included in the electrode.
Method for manufacturing perovskite silicon tandem solar cell
The present disclosure relates to a method for manufacturing a monolithic tandem solar cell in which a perovskite solar cell is laminated and bonded on a silicon solar cell. According to the present disclosure, a first microporous precursor thin film is formed through a sputtering method on a substrate having an unevenly structured texture and then a halide thin film is formed on the first microporous precursor thin film to form a perovskite absorption layer, whereby light reflectance can be reduced and a path of light can be increased, and accordingly a light absorption rate can be increased.
METHOD OF MANUFACTURING .Math.-TANDEM PHOTOVOLTAIC CELLS AND .Math.-TANDEM PHOTOVOLTAIC CELL PRODUCED BY THIS METHOD
A method of producing photovoltaic cells with the μ-tandem architecture based on crystalline silicon substrates and quantum dots, ensuring both effective and stable operation of the entire tandem system as well as high absorption in the spectral range from UV to MIR and operation in scattered and incident light conditions at different angles, acting as an anti-reflective layer. A further purpose of the invention is to develop a new structure of a μ-tandem photovoltaic cell based on microcrystalline silicon (Si) layers and a layer of nanometric semiconductor structures with a core-shell architecture such that the resulting structures work as a tandem cell with the characteristics of micro-cells, connected together in its lower part.
Solar cell and solar cell module
Embodiments of the present disclosure provide a solar cell and a solar cell module. The solar cell includes a first region and a second region, and further includes a substrate having a first surface and a second surface; a tunneling layer covering the second surface; a first emitter disposed on part of the tunneling layer in the first region; and a second emitter disposed on part of the tunneling layer in the second region and on the first emitter, a conductivity type of the second emitter being different from a conductivity type of the first emitter. The solar cell further includes a first electrode disposed in the first region and configured to electrically connect with the first emitter by penetrating through the second emitter; and a second electrode disposed in the second region and configured to electrically connect with the second emitter.
Method of manufacturing μ-tandem photovoltaic cells and μ-tandem photovoltaic cell produced by this method
A method of producing photovoltaic cells with the μ-tandem architecture based on crystalline silicon substrates and quantum dots, ensuring both effective and stable operation of the entire tandem system as well as high absorption in the spectral range from UV to MIR and operation in scattered and incident light conditions at different angles, acting as an anti-reflective layer. A further purpose of the invention is to develop a new structure of a μ-tandem photovoltaic cell based on microcrystalline silicon (Si) layers and a layer of nanometric semiconductor structures with a core-shell architecture such that the resulting structures work as a tandem cell with the characteristics of micro-cells, connected together in its lower part.
SOLAR CELL, MANUFACTURING METHOD THEREOF, AND PHOTOVOLTAIC MODULE
Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 μm; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.
SOLAR CELL AND SOLAR CELL MODULE
Embodiments of the present disclosure provide a solar cell and a solar cell module. The solar cell includes a first region and a second region, and further includes a substrate having a first surface and a second surface; a tunneling layer covering the second surface; a first emitter formed on part of the tunneling layer in the first region; and a second emitter formed on part of the tunneling layer in the second region and on the first emitter, a conductivity type of the second emitter being different from a conductivity type of the first emitter. The solar cell further includes a first electrode configured to electrically connect with the first emitter by penetrating through the second emitter; and a second electrode formed in the second region and configured to electrically connect with the second emitter.
Solar cell, manufacturing method thereof, and photovoltaic module
Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 μm; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.