Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.

An electrical device includes a substrate with a compressive layer, a neutral stress buffer layer and a tensile stress compensation layer. The stress buffer layer and the stress compensation layer may each be formed with aluminum nitride using different processing parameters to provide a different intrinsic stress value for each layer. The aluminum nitride tensile layer is configured to counteract stresses from the compressive layer in the device to thereby control an amount of substrate bow in the device. This is useful for protecting fragile materials in the device, such as mercury cadmium telluride. The aluminum nitride stress compensation layer also can compensate for forces, such as due to CTE mismatches, to protect the fragile layer. The device may include temperature-sensitive materials, and the aluminum nitride stress compensation layer or stress buffer layer may be formed at a temperature below the thermal degradation temperature of the temperature-sensitive material.

A semiconductor device includes a germanium region, a doped region in the germanium region, wherein the doped region is of a first conductivity type; and a counter-doped region in the germanium region and adjacent to the doped region, wherein the counter-doped region is of a second conductivity type different from the first conductivity type.

Systems and methods for monitoring copper corrosion in an integrated circuit (IC) device are disclosed. A corrosion-sensitive structure formed in the IC device may include a p-type active region adjacent an n-type active region to define a p-n junction space charge region. A copper region formed over the silicon may be connected to both the p-region and n-region by respective contacts, to thereby define a short circuit. Light incident on the p-n junction space charge region, e.g., during a CMP process, creates a current flow through the metal region via the short circuit, which drives chemical reactions that cause corrosion in the copper region. Due to the short circuit configuration, the copper region is highly sensitive to corrosion. The corrosion-sensitive structure may be arranged with less corrosion-sensitive copper structures in the IC device, with the corrosion-sensitive structure used as a proxy to monitor for copper corrosion in the IC device.

Systems and methods for monitoring copper corrosion in an integrated circuit (IC) device are disclosed. A corrosion-sensitive structure formed in the IC device may include a p-type active region adjacent an n-type active region to define a p-n junction space charge region. A copper region formed over the silicon may be connected to both the p-region and n-region by respective contacts, to thereby define a short circuit. Light incident on the p-n junction space charge region, e.g., during a CMP process, creates a current flow through the metal region via the short circuit, which drives chemical reactions that cause corrosion in the copper region. Due to the short circuit configuration, the copper region is highly sensitive to corrosion. The corrosion-sensitive structure may be arranged with less corrosion-sensitive copper structures in the IC device, with the corrosion-sensitive structure used as a proxy to monitor for copper corrosion in the IC device.

A photodetector comprising an optical waveguide structure comprising at least three stripes spaced from one another such that a slot is present between each two adjacent stripes of the at least three stripes. A graphene absorption layer is provided over or underneath the at least three stripes. There is an electrode for each stripe, over or underneath the graphene absorption layer. The photodetector is configured such that two adjacent electrodes are biased using opposite polarities to create a p-n junction effect in a portion of the graphene absorption layer. In particular the portion of the graphene absorption layer is located over or underneath each respective slot between said each two adjacent stripes.

An optical semiconductor element includes an optical receiver including a first semiconductor layer, a heater for heating the first semiconductor layer; and a monitor. A first semiconductor layer that absorbs light and generates electric carriers; a heater for heating the first semiconductor layer; and a monitor including a second semiconductor layer in which dark current is changed by heat generated by the heater.

A photodetection element that includes: a substrate with a high infrared transmittance in a desired wavelength region; an electron barrier layer of a type-I superlattice structure, the electron barrier layer being formed above the substrate and lattice-matched to the substrate; and a light-receiving layer of a type-II superlattice structure, formed in contact with the electron barrier layer.

A photo-sensitive device includes a uniform layer, a gradated buffer layer over the uniform layer, a silicon layer over the gradated buffer layer, a photo-sensitive light-sensing region in the uniform layer and the silicon layer, a device layer on the silicon layer, and a carrier wafer bonded to the device layer.

A photodetecting device includes a substrate, a first photosensitive layer supported by the substrate, and a second photosensitive layer supported by the substrate and adjacent to the first photosensitive layer, each of the first photosensitive layer and the second photosensitive layer being coupled to a first doped portion having a first conductivity type, and a second doped region having a second conductivity type different from the first conductivity type, wherein the first photosensitive layer is separated from the second photosensitive layer, and the first doped portion coupled to the first photosensitive layer is electrically connected to the first doped portion coupled to the second photosensitive layer.