A lateral interband Type II engineered (LITE) detector is provided. LITE detectors use engineered heterostructures to spatially separate electrons and holes into separate layers. The device may have two configurations, a positive intrinsic (PIN) configuration and a BJT (Bipolar junction transistor) configuration. The PIN configuration may have a wide bandgap (WBG) layer that transports the holes above a narrow bandgap (NBG) absorber layer that absorbs the target radiation and transports the electrons. The BJT configuration may have a WBG layer operating as a BJT above an NBG layer. In both configurations, the LITE design uses a Type II staggered offset between the NBG layers and the WBG layers that provides a built-in field for the holes to drift from an absorber region to a transporter region.

A lateral interband Type II engineered (LITE) detector is provided. LITE detectors use engineered heterostructures to spatially separate electrons and holes into separate layers. The device may have two configurations, a positive intrinsic (PIN) configuration and a BJT (Bipolar junction transistor) configuration. The PIN configuration may have a wide bandgap (WBG) layer that transports the holes above a narrow bandgap (NBG) absorber layer that absorbs the target radiation and transports the electrons. The BJT configuration may have a WBG layer operating as a BJT above an NBG layer. In both configurations, the LITE design uses a Type II staggered offset between the NBG layers and the WBG layers that provides a built-in field for the holes to drift from an absorber region to a transporter region.

A waveguide photodetector includes a first contact layer of a first conductivity type, a waveguide layer, and a second contact layer of a second conductivity type that are sequentially formed on the semiconductor substrate. The waveguide layer includes a first cladding layer of the first conductivity type disposed on a side of the first contact layer, a second cladding layer of the second conductivity type disposed on a side of the second contact layer, and the core layer disposed between the first cladding layer and the second cladding layer. The core layer includes a light absorption layer and an impurity-doped light absorption layer that has a higher concentration of a p-type impurity than that of the light absorption layer and is disposed on a side of a light incident face.

A method includes forming an assembly of layers including an InP cap layer on an InGaAs absorption region layer, wherein the InGaAs layer is on an n-InP layer, and wherein an underlying substrate layer underlies the n-InP layer. The method includes removing a portion of the InP cap and n-InP layer by dry etching.

A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group device can be optically and/or electrically connected to group IV devices in the group IV substrate.

A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group device can be optically and/or electrically connected to group IV devices in the group IV substrate.

Provided is a waveguide photodetector including a semiconductor substrate, a first optical waveguide and a second optical waveguide, which are sequentially laminated on the semiconductor substrate, in which each of the first optical waveguide and the second optical waveguide includes a first portion and a second portion, and the first portion extends from the second portion in a first direction parallel to a top surface of the semiconductor substrate, a refractive index matching layer disposed on the second portion of the second optical waveguide, a clad layer disposed on the refractive index matching layer, and an absorber disposed between the refractive index matching layer and the clad layer. Here, the second optical waveguide has a first conductive-type, the clad layer has a second conductive-type opposite to the first conductive-type, and the refractive index matching layer includes a first semiconductor layer that is an intrinsic semiconductor layer.

The present disclosure provides a photodiode based on a stannous selenide sulfide nanosheet/GaAs heterojunction and a preparation method and use thereof. The photodiode comprises a structure of the stannous selenide sulfide nanosheet/GaAs heterojunction, forming Au electrodes through thermal vapor deposition on the stannous selenide sulfide nanosheet and GaAs, respectively, and conducting an annealing treatment in a protective gas at a temperature in a range of 150-250° C. The heterojunction is formed by transferring the stannous selenide sulfide nanosheet to a GaAs window, and the GaAs window is obtained by depositing a medium layer film on GaAs and etching the medium layer through lithography and an etchant.

The present disclosure provides a photodiode based on a stannous selenide sulfide nanosheet/GaAs heterojunction and a preparation method and use thereof. The photodiode comprises a structure of the stannous selenide sulfide nanosheet/GaAs heterojunction, forming Au electrodes through thermal vapor deposition on the stannous selenide sulfide nanosheet and GaAs, respectively, and conducting an annealing treatment in a protective gas at a temperature in a range of 150-250° C. The heterojunction is formed by transferring the stannous selenide sulfide nanosheet to a GaAs window, and the GaAs window is obtained by depositing a medium layer film on GaAs and etching the medium layer through lithography and an etchant.

An integrated circuit includes a photodetector that has an epitaxial layer with a first conductivity type located over a substrate. A buried layer of the first conductivity type is located within the epitaxial layer and has a higher carrier concentration than the epitaxial layer. A semiconductor layer located over the buried layer has an opposite second conductivity type and includes a first sublayer over the buried semiconductor layer and a second sublayer between the first sublayer and the buried layer. The first sublayer has a larger lateral dimension than the second sublayer, and has a lower carrier concentration than the second sublayer.