Patent classifications
H01L2221/1026
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
A method for forming a semiconductor structure includes following operations. A first metallization feature is formed, and a first cap layer is formed over the first metallization feature. A first insulating layer is formed over the first cap layer and the first metallization feature. A first dielectric structure is formed over the first insulating layer. A portion of the first dielectric structure and a portion of the first insulating layer are removed to expose the first cap layer. A second cap layer is formed over the first cap layer and the first metallization feature. A second insulating layer and a patterned second dielectric structure are formed over the substrate. The patterned second dielectric structure includes a trench and a via opening coupled to a bottom of the trench. A second metallization feature is formed in the trench, and a via structure is formed in the via opening.
METHODS OF FORMING SELF-ALIGNED DEVICE LEVEL CONTACT STRUCTURES
One illustrative method disclosed includes, among other things, forming a silicon dioxide etch stop layer on and in contact with a source/drain region and adjacent silicon nitride sidewall spacers positioned on two laterally spaced-apart transistors having silicon dioxide gate cap layers, performing a first etching process through an opening in a layer of insulating material to remove the silicon nitride material positioned above the source/drain region, performing a second etching process to remove a portion of the silicon dioxide etch stop layer and thereby expose a portion of the source/drain region, and forming a conductive self-aligned contact that is conductively coupled to the source/drain region.