Patent classifications
H01L2221/1089
Methods for producing interconnects in semiconductor devices
A method for forming metallization in a workpiece includes electrochemically depositing a second metallization layer on the workpiece comprising a nonmetallic substrate having a dielectric layer disposed over a substrate and a continuous first metallization layer disposed on the dielectric layer and having at least one microfeature comprising a recessed structure, wherein the first metallization layer at least partially fills a feature on the workpiece, where the first metallization layer is a cobalt or nickel metal layer, and wherein the second metallization layer is a cobalt or nickel metal layer that is different from the metal of the first metallization layer, electrochemically depositing a copper cap layer after filling the feature, and annealing the workpiece to diffuse the metal of the second metallization layer into the metal of the first metallization layer.
Self-ionized and inductively-coupled plasma for sputtering and resputtering
A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target. The magnetron preferably is a small, strong one having a stronger outer pole of a first magnetic polarity surrounding a weaker outer pole of a second magnetic polarity and rotates about the central axis of the chamber. The auxiliary magnets preferably have the first magnetic polarity to draw the unbalanced magnetic field component toward the wafer. The auxiliary magnets may be either permanent magnets or electromagnets.
Barrier structure for copper interconnect
A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
LOW TEMPERATURE MOLYBDENUM FILM DEPOSITION UTILIZING BORON NUCLEATION LAYERS
The disclosure relates to a method of making molybdenum films utilizing boron and molybdenum nucleation layers. The resulting molybdenum films have low electrical resistivity, are substantially free of boron, and can be made at reduced temperatures compared to conventional chemical vapor deposition processes that do not use the boron or molybdenum nucleation layers. The molybdenum nucleation layer formed by this process can protect the substrate from the etching effect of MoCl.sub.5 or MoOCl.sub.4, facilitates nucleation of subsequent CVD Mo growth on top of the molybdenum nucleation layer, and enables Mo CVD deposition at lower temperatures. The nucleation layer can also be used to control the grain sizes of the subsequent CVD Mo growth, and therefore controls the electrical resistivity of the Mo film.
CONDUCTIVE STRUCTURE, LAYOUT STRUCTURE INCLUDING CONDUCTIVE STRUCTURE, AND METHOD FOR MANUFACTURING CONDUCTIVE STRUCTURE
A layout structure including a conductive structure is provided. The layout structure includes a dielectric layer formed on a substrate and a conductive structure formed in the dielectric layer. And the conductive structure further includes a barrier layer, a metal layer formed within the barrier layer, and a high resistive layer sandwiched in between the barrier layer and the metal layer.
Method to deposit CVD ruthenium
Methods for depositing ruthenium by a PECVD process are described herein. Methods for depositing ruthenium can include positioning a substrate in a processing chamber, the substrate having a barrier layer formed thereon, heating and maintaining the substrate at a first temperature, flowing a first deposition gas into a processing chamber, the first deposition gas comprising a ruthenium containing precursor, generating a plasma from the first deposition gas to deposit a first ruthenium layer over the barrier layer, flowing a second deposition gas into the processing chamber to deposit a second ruthenium layer over the first ruthenium layer, the second deposition gas comprising a ruthenium containing precursor, depositing a copper seed layer over the second ruthenium layer and annealing the substrate at a second temperature.
DOPED SELECTIVE METAL CAPS TO IMPROVE COPPER ELECTROMIGRATION WITH RUTHENIUM LINER
Embodiments of the present disclosure are related to improved methods for forming an interconnect structure in a substrate. In one implementation, the method includes providing a substrate comprising a metal region and a dielectric region surrounding the metal region, selectively forming a cobalt-containing alloy cap layer on the metal region by exposing the substrate to a first precursor and a second precursor, the first precursor and the second precursor are selected from a group consisting of an aluminum-containing precursor, a cobalt-containing precursor, a ruthenium-containing precursor, a manganese-containing precursor, and a tungsten-containing precursor, wherein the first precursor is different from the second precursor.
Conductive structure having an entrenched high resistive layer
A conductive structure includes a substrate including a first dielectric layer formed thereon, a first trench formed in the first dielectric layer, a first barrier layer formed in the first trench, a first nucleation layer formed on the first barrier layer, a first metal layer formed on the first nucleation layer, and a first high resistive layer sandwiched in between the first barrier layer and the first metal layer.
CVD Mo DEPOSITION BY USING MoOCl4
A method of forming a molybdenum-containing material on a substrate is described, in which the substrate is contacted with molybdenum oxytetrachloride (MoOCl.sub.4) vapor under vapor deposition conditions, to deposit the molybdenum-containing material on the substrate. In various implementations, a diborane contact of the substrate may be employed to establish favorable nucleation conditions for the subsequent bulk deposition of molybdenum, e.g., by chemical vapor deposition (CVD) techniques such as pulsed CVD.
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.