A method for tuning a resonant frequency of wireless communication circuitry on a multichip module including a plurality of chips includes applying an electrical insulator to an upper surface of the multichip module; creating a plurality of openings in the electrical insulator, each opening being positioned at a successive one of the bond pads to be electrically connected to create a plurality of exposed bond pads; applying metal to each exposed bond pad to form a successive one of a plurality of interconnect bases; removing a portion of the layer of photoresist to create a plurality of bridge supports, each bridge support positioned between a successive pair of interconnect bases; applying metal to each bridge support and associated interconnect bases to form a successive one of the interconnect traces; removing the bridge supports; and disconnecting one or more of the interconnect traces as necessary to obtain a target resonant frequency.

A radio-frequency module includes: a transmitting circuit disposed on a mounting substrate to process a radio-frequency signal input from a transmission terminal and to output a resultant signal to a common terminal; a receiving circuit disposed on the mounting substrate to process a radio-frequency signal input from the common terminal and to output a resultant signal to a reception terminal; a first inductor included in a first transmitting circuit; and a bonding wire connected to the ground and bridging over the first inductor.

A multi-chip package with reduced calibration time and an impedance control (ZQ) calibration method thereof are provided. A master chip of the multi-chip package performs a first ZQ calibration operation by using a ZQ resistor, and then, the other slave chips simultaneously perform second ZQ calibration operations with respect to data input/output (DQ) pads of the slave chips by using a termination resistance value of a DQ pad of the master chip on the basis of a one-to-one correspondence relationship with the DQ pad of the master chip. The multi-chip package completes ZQ calibration by performing two ZQ calibration operations, thereby decreasing a ZQ calibration time.

Replaceable contact pads of end effectors are provided. The contact pads support substrates in electronic device manufacturing. The contact pad includes a contact pad head having a contact surface configured to contact a substrate, a shaft coupled to the contact pad head, the shaft including a shaft indent formed between an underside of the contact pad head and a shaft end, and a circular securing member received around the shaft and seated in the shaft indent and configured to secure the contact pad to the end effector body. End effectors including replaceable contact pads and maintenance methods are described, as are additional aspects.

Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

A high frequency amplifier includes a first transistor and a second transistor, a first drain pad connected to the first transistor and a second drain pad connected to the second transistor, a matching circuit pattern having a first transmission line connected to the first drain pad and a second transmission line connected to the second drain pad, a first wire and a second wire, and a wiring pattern connected to the first drain pad via the first transmission line and the first wire and connected to the second drain pad via the second transmission line and the second wire. An effective impedance of the second wire is larger than an effective impedance of the first wire. The matching circuit pattern has an asymmetrical external shape. An electrical length of the second transmission line is shorter than an electrical length of the first transmission line.

A semiconductor device according to one embodiment includes: a semiconductor chip having a transistor and a drain pad provided on a board; a capacitor having an upper electrode and a lower electrode interposing a dielectric; a pad; and an empty pad provided on the board of the semiconductor chip. The semiconductor device further includes: a first wire connecting the pad and the drain pad of the semiconductor chip to each other; a second wire connecting the empty pad and the upper electrode of the capacitor to each other; and a third wire connecting the pad and the empty pad to each other.

An amplifier (T1) amplifies an input signal. A harmonic matching circuit (3) is connected to an output end of the amplifier (T1) via a first wire (W1). The harmonic matching circuit (3) includes a first inductor (L1) connected to the first wire (W1), a first capacitor (C1) connected in series to the first inductor (L1), a second inductor (L2) connected in parallel with the first inductor (L1), and a second capacitor (C2) connected in series to the second inductor (L2). The first inductor (L1) and the second inductor (L2) form a subtractive-polarity coupler which presents mutual inductance having subtractive polarity.

In many examples, a device comprises a transmitter. The transmitter comprises a power amplifier, a first transformer coil coupled to the power amplifier, and a second transformer coil adapted to be electromagnetically coupled to the first transformer coil. The transmitter also comprises a first bond wire coupled to a first end of the second transformer coil and adapted to be coupled to a first end of an antenna, a capacitor coupled to a second end of the second transformer coil, a switch coupled to the capacitor and configured to engage and disengage the capacitor from the transmitter, and a second bond wire coupled to the switch and adapted to be coupled to a second end of the antenna.

Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.