A radio frequency (RF) chip package includes: an RF die; a first peripheral circuit chip; a second peripheral circuit chip; a substrate having a -shaped step formed on a portion thereof so that the RF die is mounted on top of the step of the substrate and the first peripheral circuit chip and the second peripheral circuit chip are mounted on top of the substrate where no step is formed; a first mutual inductance controller for controlling the dimension of the mutual inductance between the first peripheral circuit chip and the RF die; and a second mutual inductance controller for controlling the dimension of the mutual inductance between the second peripheral circuit chip and the RF die.

A high frequency semiconductor device package includes a metal plate, a frame body, a first lead part, a second lead part, a first conductive layer, and a second conductive layer. The frame body includes a first frame part made and a second frame part. The first frame part has a lower surface bonded to the metal plate. The first frame part has an upper surface including a first region and a second region. The first lead part protrudes outward along a line passing through a central part of the first region and a central part of the second region in plan view. The second lead part protrudes outward along the line in plan view. The first conductive layer includes a first stripe part and a first connection part. The second conductive layer includes a second stripe part and a second connection part.

A high-frequency circuit device includes: a chip which includes a high-frequency element, a high-frequency circuit, a signal conductor, and a chip ground; a package substrate on which the chip is disposed, a shunt path which is constituted by a package signal conductor which is disposed on an upper surface of the package substrate and is electrically connected to the signal conductor, a package first ground which is electrically connected to the chip ground, and a shunt element which is electrically connected to the package signal conductor and the package first ground; and a package second ground which is disposed at least inside the base of the package substrate or on a back surface of the package substrate, wherein a part of the base, a part of the shunt path, and the package second ground constitute a capacitive structure.

A device that includes a metal submount; a first transistor die arranged on said metal submount; a second transistor die arranged on said metal submount; a set of primary interconnects; and a set of secondary interconnects. Additionally, the set of primary interconnects and the set of secondary interconnects are configured to provide RF signal coupling between the first transistor die and the second transistor die by electromagnetic coupling.

An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.

The present invention relates to a two-end driving, high-frequency sub-substrate structure, comprising a sub-substrate body, wherein: the sub-substrate body has an upper side provided with a first signal pad area and a second signal pad area, the first signal pad area and the second signal pad area are symmetric with respect to each other, each of the first signal pad area and the second signal pad area extends from one of two lateral portions of the sub-substrate body in an extending direction toward a center of the sub-substrate body and terminates in an end, the end of the first signal pad area is adjacent to but spaced from the end of the second signal pad area, the first signal pad area is configured for supporting a semiconductor chip provided thereon, the second signal pad area is provided with a jumper wire connected to an electrode of the semiconductor chip, there are two grounding pad areas provided respectively on two lateral sides of the first signal pad area and the second signal pad area and constituting a portion of a coplanar waveguide, the sub-substrate body has an inner layer or bottom side that is provided with a grounding layer or combined with a grounding layer.

A circuit board and package assembly electrically connecting a die to a circuit board. The circuit board has signal paths terminating in a signal pad located on an insulating layer. The circuit board also includes a ground pad on the insulating layer that has a concave shaped side forming a recess, the with a signal pad at least partially within the recess. A package has package ground pads aligned with the circuit board ground pads and package signal pads aligned with circuit board signal pads. The package ground pads extend through the package to connect to package ground paths, which extend toward the die. The package signal pads extend through the package to connect to package signal paths and the package signal paths extend toward the die, maintaining a consistent distance from the package ground paths. Multiple-tier bond wires connect the package bond locations to the die bond pads.

The disclosure is directed to an electronic device with a lid to manage radiation feedback. The electronic device includes a lid having at least one sidewall and a top wall, as well as a semiconductor positioned within a cavity of the lid. In certain embodiments, the lid includes at least one dielectric material and at least one internal conductive layer at least partially embedded within the at least one dielectric material. In certain embodiments, the lid includes dielectric material, as well as an internal wall extending from the top wall and positioned between an input port and an output port of the semiconductor. Such configurations may suppress any undesirable feedback through the lid between the input port and the output port of the semiconductor.

Radio frequency (RF) packages containing multilevel power substrates and associated fabrication methods are disclosed. In an embodiment, the method includes producing a multilevel substrate panel by obtaining a base panel level containing prefabricated base structures and having a surface through which metallic surfaces of the prefabricated base structures are exposed. A secondary panel level is formed on the base layer to include patterned metal features embedded in a secondary dielectric body and electrically contacting the exposed metallic surfaces of the prefabricated base structures at a direct plated interface. The presingulated array of multilevel power substrates is separated into singulated multilevel power substrates each including a base substrate level formed from a singulated piece of the base panel level and a secondary substrate level formed from a singulated piece of the secondary substrate level.

A transistor device includes a metal submount; a transistor die arranged on said metal submount; at least one integrated passive device (IPD) component that includes a substrate arranged on said metal submount; and one or more interconnects extending between the transistor die and the at least one integrated passive device (IPD) component. The substrate includes a silicon carbide (SiC) substrate.