Packaged modules for use in wireless devices are disclosed. A substrate supports integrated circuit die including at least a portion of a baseband system and a front end system, an oscillator assembly, and an antenna. The oscillator assembly includes an enclosure to enclose the oscillator and conductive pillars formed at least partially within a side of the enclosure to conduct signals between the top and bottom surfaces of the oscillator assembly. Components can be vertically integrated to save space and reduce trace length. Vertical integration provides an overhang volume that can include discrete components. Radio frequency shielding and ground planes within the substrate shield the front end system and antenna from radio frequency interference. Stacked filter assemblies include passive surface mount devices to filter radio frequency signals.

A semiconductor die comprises a first active device, at least one of a second active device and a passive component, and electromagnetic shielding configured to at least partially electromagnetically isolate the first active device from the at least one of the second active device and the passive component. The electromagnetic shielding includes one of a grounded metal layer and via stack, and a grounded metal layer disposed one of above and below the first active device.

A packaged RF amplifier device includes input and output leads and a transistor die. The transistor die includes a transistor with a drain-source capacitance below 0.1 picofarads per watt. The device also includes a conductive connection between the transistor output terminal and the output lead, and a baseband termination circuit between the transistor output terminal and a ground reference node. The baseband termination circuit presents a low impedance to signal energy at envelope frequencies and a high impedance to signal energy at RF frequencies. The baseband termination circuit includes an inductive element, a resistor, and a capacitor connected in series between the transistor output terminal and the ground reference node. Except for a minimal impedance transformation associated with the conductive connection, the device is unmatched between the transistor output terminal and the output lead by being devoid of impedance matching circuitry between the transistor output terminal and the output lead.

An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

Various aspects of the present disclosure are directed toward methods and apparatus that include a lead frame with a fixed external pin pitch. A differential signal path is provided that is characterized by bond-pad pitch range, wire length and wire diameter. The differential signal path carries signals in a frequency range between 5 GHz and 16.1 GHz with less than about 25 dB differential return loss (DDRL). Further, the signals are processed at a signal-processing node that is electrically coupled to the differential signal path by using the differential signal path to carry signals in a frequency range between 5 GHz and about 16.1 GHz.

Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.

RF transistor amplifiers are provided that include a submount and an RF transistor amplifier die that is mounted on top of the submount. A multi-layer encapsulation is formed that at least partially covers the RF transistor amplifier die. The multi-layer encapsulation includes a first dielectric layer and a first conductive layer, where the first dielectric layer is between a top surface of the RF transistor amplifier die and the first conductive layer.

A device includes: a first chip including a qubit; and a second chip bonded to the first chip, the second chip including a substrate including first and second opposing surfaces, the first surface facing the first chip, wherein the second chip includes a single layer of superconductor material on the first surface of the substrate, the single layer of superconductor material including a first circuit element. The second chip further includes a second layer on the second surface of the substrate, the second layer including a second circuit element. The second chip further includes a through connector that extends from the first surface of the substrate to the second surface of the substrate and electrically connects a portion of the single layer of superconducting material to the second circuit element.

A non-conductive encapsulation cover is mounted on a support face of a support substrate to delimit, with the support substrate, an internal housing. An integrated circuit chip is mounted to the support substrate within the internal housing. A metal pattern is mounted to an internal wall of the non-conductive encapsulation cover in a position facing the support face. At least two U-shaped metal wires are provided within the internal housing, located to a side of the integrated circuit chip, and fixed at one end to the metallic pattern and at another end to the support face.

Package assemblies for improving heat dissipation of high-power components in microwave circuits are described. A laminate that includes microwave circuitry may have cut-outs that allow high-power components to be mounted directly on a heat slug below the laminate. Electrical connections to circuitry on the laminate may be made with wire bonds. The packaging allows more flexible design and tuning of packaged microwave circuitry.