H01L2223/6627

MILLIMETER WAVE COMPONENTS IN A GLASS CORE OF A SUBSTRATE

Embodiments described herein may be related to apparatuses, processes, and techniques related creating millimeter wave components within a glass core of a substrate within a semiconductor package. These millimeter wave components, which include resonators, isolators, directional couplers, and circulators, may be combined to form other structures such as filters or multiplexers. Other embodiments may be described and/or claimed.

COAXIAL STRUCTURE IN A GLASS SUBSTRATE

Embodiments described herein may be related to apparatuses, processes, and techniques related to creating coaxial structures within glass package substrates. These techniques, in embodiments, may be extended to create other structures, for example capacitors within glass substrates. Other embodiments may be described and/or claimed.

DIE TO DIE HIGH-SPEED COMMUNICATION WITHOUT DISCRETE AMPLIFIERS BETWEEN A MIXER AND TRANSMISSION LINE
20220406737 · 2022-12-22 ·

Embodiments described herein may be related to apparatuses, processes, and techniques related to a transceiver architecture for inter-die communication on-package using mm-wave/THz interconnects. In particular, amplifier-less transceivers are used in combination with on-package low loss transmission lines to provide inter-die communication. In embodiments, signals on the interconnect may be transmitted between up conversion mixers and down conversion mixers without any additional amplification. Other embodiments may be described and/or claimed.

3D INDUCTOR DESIGN USING BUNDLE SUBSTRATE VIAS
20220406882 · 2022-12-22 ·

A three dimensional (3D) inductor is described. The 3D inductor includes a first plurality of micro-through substrate vias (TSVs) within a first area of a substrate. The 3D inductor also includes a first trace on a first surface of the substrate, coupled to a first end of the first plurality of micro-TSVs. The 3D inductor further includes a second trace on a second surface of the substrate, opposite the first surface, coupled to a second end, opposite the first end, of the first plurality of micro-TSVs.

CONTACTLESS COMMUNICATION USING A WAVEGUIDE EXTENDING THROUGH A SUBSTRATE CORE

Embodiments described herein may be related to apparatuses, processes, and techniques related to contactless transmission within a package that combines radiating elements with vertical transitions in the package, in particular to a waveguide within a core of the package that is surrounded by a metal ring. A radiating element on one side of the substrate core and above the waveguide surrounded by the metal ring communicates with another radiating element on the other side of the substrate core and below the waveguide surrounded by the metal ring. Other embodiments may be described and/or claimed.

SEMICONDUCTOR DEVICE
20220406700 · 2022-12-22 ·

A wiring substrate includes: a first insulating layer; a first metal pattern formed on the first insulating layer; a second insulating layer formed on the first insulating layer so as to cover the first metal pattern; a second metal pattern formed on the second insulating layer; and an organic insulating film contacted with a portion of the second metal pattern. Also, the first metal pattern has: a first lower surface contacted with the first insulating layer; and a first upper surface contacted with the second insulating layer. Also, the second metal pattern has: a second lower surface contacted with the second insulating layer; and a second upper surface contacted with the organic insulating film. Further, a surface roughness of the second upper surface is larger than a surface roughness of each of the second lower surface, the first upper surface and the first lower surface.

INTEGRATED CIRCUIT BACKSIDE RADIATION/RESONATOR

An integrated circuit (IC) includes a semiconductor substrate having a first surface and a second surface opposite the first surface. A through wafer trench (TWT) extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate. Dielectric material is in the TWT. An interconnect region has layers of dielectric on the first surface of the substrate. The interconnect region has a conductive transmit patch. An antenna is formed, at least in part, by the dielectric material in the TWT and the transmit patch in the interconnect region. The antenna is configured to transmit or receive electromagnetic radiation between the transmit patch and the second surface of the semiconductor substrate through the dielectric material within the trench.

COMPACT SURFACE TRANSMISSION LINE WAVEGUIDES WITH VERTICAL GROUND PLANES

Embodiments disclosed herein include coplanar waveguides and methods of forming coplanar waveguides. In an embodiment, a coplanar waveguide comprises a core, and a signal trace on the core. In an embodiment, the signal trace has a first edge and a second edge. In an embodiment, a first ground trace is over the core, and the first ground trace is adjacent to the first edge of the signal trace. In an embodiment, a first ground via plane is below the first ground trace. The coplanar waveguide may further comprise a second ground trace over the core, and the second ground trace is adjacent to the second edge of the signal trace. In an embodiment, a second ground via plane below the second ground trace.

SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME

The present disclosure provides a semiconductor device package including a substrate, a waveguide component, and an antenna pattern. The substrate includes a feeding element. The waveguide component is disposed over the substrate. The antenna pattern is disposed over the substrate. The waveguide component is substantially aligned with the feeding element and the antenna pattern.

Method for forming semiconductor device

A semiconductor device is disclosed. The semiconductor device includes a first die on a first substrate, a second die on a second substrate separate from the first substrate, a transmission line in a redistribution layer on a wafer, and a magnetic structure surrounds the transmission line. The first transmission line electrically connects the first die and the second die. The magnetic structure is configured to increase the characteristic impedance of the transmission line, which can save the current and power consumption of a current mirror and amplifier in a 3D IC chip-on-wafer-on-substrate (CoWoS) semiconductor package.