H01L2223/6638

ELECTRONIC PACKAGE WITH ROTATED SEMICONDUCTOR DIE
20220108954 · 2022-04-07 · ·

An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.

CHIP PACKAGING APPARATUS AND TERMINAL DEVICE
20220084849 · 2022-03-17 ·

The technology of this disclosure relates to a chip packaging apparatus. The chip packaging apparatus includes a first differential pin pair, a first pin, and a second pin. The first differential pin pair includes a first differential signal pin and a second differential signal pin. In addition, the first pin and the second pin are both located between the first differential signal pin and the second differential signal pin, and the first pin and the second pin are differential signal pins (or both are power pins). The first pin is adjacent to the first differential signal pin and the second differential signal pin. The second pin is adjacent to the first differential signal pin and the second differential signal pin. The first pin and the second pin are respectively located on two sides of a first imaginary straight line connecting the first differential signal pin to the second differential signal pin.

Hybrid Dielectric Scheme in Packages
20220093498 · 2022-03-24 ·

A method includes forming a first redistribution line, forming a polymer layer including a first portion encircling the first redistribution line and a second portion overlapping the first redistribution line, forming a pair of differential transmission lines over and contacting the polymer layer, and molding the pair of differential transmission lines in a molding compound. The molding compound includes a first portion encircling the pair of differential transmission lines, and a second portion overlapping the pair of differential transmission lines. An electrical connector is formed over and electrically coupling to the pair of differential transmission lines.

Ground reference shape for high speed interconnect

Apparatus and methods are provided for providing provide high-speed interconnect using bond wires. According to various aspects of the subject innovation, the provided techniques may provide a ground shape to shield a high-speed signal wire from the substrate in a semiconductor assembly. In an exemplary embodiment, there is provided an assembly that may comprise a substrate, a semiconductor die attached to the substrate, a signal bond wire connecting a bond pad on the semiconductor die and a bond finger on the substrate, and a ground shape on the substrate to shield the signal wire from the substrate.

Nested interconnect structure in concentric arrangement for improved package architecture

An integrated circuit (IC) package is described. The IC package includes back-end-of-line layers on a substrate. The IC package also includes a nested interconnect structure on the back-end-of-line layers on the substrate. The nested interconnect structure is composed of an inner core pad and an outer ring pad in a concentric arrangement. The IC package further includes a redistribution layer on the nested interconnect structure. The IC package also includes an under bump metallization layer on the redistribution layer to support package balls.

Module with high peak bandwidth I/O channels
11239922 · 2022-02-01 ·

A high peak bandwidth I/O channel embedded within a multilayer surface interface that forms the bus circuitry electrically interfacing the output or input port on a first semiconductor die with the input or output port on a second semiconductor die.

TRANSMISSION CIRCUIT AND ELECTRONIC DEVICE
20210273010 · 2021-09-02 ·

A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.

PACKAGE STRUCTURE AND MANUFACTURING METHOD OF PACKAGE STRUCTURE THEREOF

A package structure including at least one semiconductor die and a redistribution structure is provided. The semiconductor die is laterally encapsulated by an encapsulant, and the redistribution structure is disposed on the semiconductor die and the encapsulant and electrically connected with the semiconductor die. The redistribution structure includes signal lines and a pair of repair lines. The signal lines include a pair of first signal lines located at a first level, and each first signal line of the pair of first signal lines has a break that split each first signal line into separate first and second fragments. The pair of repair lines is located above the pair of first signal lines and located right above the break. Opposite ending portions of each repair line are respectively connected with the first and second fragments with each repair line covering the break in each first signal line.

COAXIAL THROUGH VIA WITH NOVEL HIGH ISOLATION CROSS COUPLING METHOD FOR 3D INTEGRATED CIRCUITS

A semiconductor package includes a first semiconductor device, a second semiconductor device vertically positioned above the first semiconductor device, and a ground shielded transmission path. The ground shielded transmission path couples the first semiconductor device to the second semiconductor device. The ground shielded transmission path includes a first signal path extending longitudinally between a first end and a second end. The first signal path includes a conductive material. A first insulating layer is disposed over the signal path longitudinally between the first end and the second end. The first insulating layer includes an electrically insulating material. A ground shielding layer is disposed over the insulating material longitudinally between the first end and the second end of the signal path. The ground shielding layer includes a conductive material coupled to ground. The ground shielding layer drives radiation signals received therein to ground to prevent induced noise in the first signal path.

Transmission circuit and electronic device
11043525 · 2021-06-22 · ·

A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.